From da884b450104a85d867bcf4222a511ca84ad3523 Mon Sep 17 00:00:00 2001 From: Harald Welte Date: Tue, 27 Dec 2011 22:24:38 +0100 Subject: fix #defines for LEDs, remove #defines for non-existant pins --- boards/osmo-sdr/board.h | 464 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 464 insertions(+) create mode 100644 boards/osmo-sdr/board.h (limited to 'boards/osmo-sdr') diff --git a/boards/osmo-sdr/board.h b/boards/osmo-sdr/board.h new file mode 100644 index 0000000..6275983 --- /dev/null +++ b/boards/osmo-sdr/board.h @@ -0,0 +1,464 @@ +/* ---------------------------------------------------------------------------- + * ATMEL Microcontroller Software Support + * ---------------------------------------------------------------------------- + * Copyright (c) 2008, Atmel Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the disclaimer below. + * + * Atmel's name may not be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- + */ + +//------------------------------------------------------------------------------ +/// \dir +/// !Purpose +/// +/// Definition and functions for using AT91SAM3UE-related features, such +/// has PIO pins, memories, etc. +/// +/// !Usage +/// -# The code for booting the board is provided by board_cstartup_xxx.c and +/// board_lowlevel.c. +/// -# For using board PIOs, board characteristics (clock, etc.) and external +/// components, see board.h. +/// -# For manipulating memories (NandFlash, PSRAM, etc.), see board_memories.h. +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \unit +/// !Purpose +/// +/// Definition of AT91OsmoSDR characteristics, AT91SAM3UE-dependant PIOs and +/// external components interfacing. +/// +/// !Usage +/// -# For operating frequency information, see "OsmoSDR - Operating frequencies". +/// -# For using portable PIO definitions, see "OsmoSDR - PIO definitions". +/// -# Several USB definitions are included here (see "OsmoSDR - USB device"). +//------------------------------------------------------------------------------ + +#ifndef BOARD_H +#define BOARD_H + +//------------------------------------------------------------------------------ +// Headers +//------------------------------------------------------------------------------ + +#if defined(at91sam3u4) + #include "at91sam3u4/chip.h" + #include "at91sam3u4/AT91SAM3U4.h" +#else + #error Board does not support the specified chip. +#endif + +//------------------------------------------------------------------------------ +// Definitions +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \page "OsmoSDR - Board Description" +/// This page lists several definition related to the board description. +/// +/// !Definitions +/// - BOARD_NAME + +/// Name of the board. +#define BOARD_NAME "OsmoSDR" +/// Board definition. +#define at91sam3uek +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \page "OsmoSDR - Operating frequencies" +/// This page lists several definition related to the board operating frequency +/// (when using the initialization done by board_lowlevel.c). +/// +/// !Definitions +/// - BOARD_MAINOSC +/// - BOARD_MCK + +/// Frequency of the board main oscillator. +#define BOARD_MAINOSC 12000000 + +/// Master clock frequency (when using board_lowlevel.c). +#define BOARD_MCK 48000000 + +//------------------------------------------------------------------------------ +// ADC +//------------------------------------------------------------------------------ +/// ADC clock frequency, at 10-bit resolution (in Hz) +#define ADC_MAX_CK_10BIT 5000000 +/// Startup time max, return from Idle mode (in µs) +#define ADC_STARTUP_TIME_MAX 15 +/// Track and hold Acquisition Time min (in ns) +#define ADC_TRACK_HOLD_TIME_MIN 1200 + +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \page "OsmoSDR - USB device" +/// +/// !Constants +/// - BOARD_USB_BMATTRIBUTES + +/// USB attributes configuration descriptor (bus or self powered, remote wakeup) +#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP +//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \page "OsmoSDR - PIO definitions" +/// This pages lists all the pio definitions contained in board.h. The constants +/// are named using the following convention: PIN_* for a constant which defines +/// a single Pin instance (but may include several PIOs sharing the same +/// controller), and PINS_* for a list of Pin instances. +/// +/// !ADC +/// - PIN_ADC0_AD0 +/// - PIN_ADC0_AD1 +/// - PIN_ADC0_AD2 +/// - PIN_ADC0_AD3 +/// - PIN_ADC0_AD4 +/// - PIN_ADC0_AD5 +/// - PIN_ADC0_AD6 +/// - PIN_ADC0_AD7 +/// - PINS_ADC +/// +/// !DBGU +/// - PINS_DBGU +/// +/// !EBI +/// - PIN_EBI_DATA_BUS +/// - PIN_EBI_NCS0 +/// - PIN_EBI_NRD +/// - PIN_EBI_NWE +/// - PIN_EBI_PSRAM_ADDR_BUS +/// - PIN_EBI_PSRAM_NBS +/// - PIN_EBI_A1 +/// - PIN_EBI_NCS2 +/// - PIN_EBI_LCD_RS +/// +/// !LEDs +/// - PIN_LED_0 +/// - PIN_LED_1 +/// - PIN_LED_2 +/// - PINS_LEDS +/// +/// !MCI +/// - PINS_MCI +/// - PIN_MCI_DAT0 +/// - PIN_MCI_CD +/// +/// !Push buttons +/// - PIN_PUSHBUTTON_1 +/// - PIN_PUSHBUTTON_2 +/// - PINS_PUSHBUTTONS +/// - PUSHBUTTON_BP1 +/// - PUSHBUTTON_BP2 +/// +/// !PWMC +/// - PIN_PWMC_PWMH0 +/// - PIN_PWMC_PWML0 +/// - PIN_PWMC_PWMH1 +/// - PIN_PWMC_PWML1 +/// - PIN_PWMC_PWMH2 +/// - PIN_PWMC_PWML2 +/// - PIN_PWM_LED0 +/// - PIN_PWM_LED1 +/// - PIN_PWM_LED2 +/// - CHANNEL_PWM_LED0 +/// - CHANNEL_PWM_LED1 +/// - CHANNEL_PWM_LED2 +/// +/// !SPI0 +/// - PIN_SPI0_MISO +/// - PIN_SPI0_MOSI +/// - PIN_SPI0_SPCK +/// - PIN_SPI0_NPCS2_PC14 +/// - PINS_SPI0 +/// +/// !SPI1 +/// - PIN_SPI1_MISO +/// - PIN_SPI1_MOSI +/// - PIN_SPI1_SPCK +/// - PINS_SPI1 +/// - PIN_SPI1_NPCS3 +/// +/// ! SSC +/// - PIN_SSC_TD +/// - PIN_SSC_TK +/// - PIN_SSC_TF +/// - PINS_SSC_CODEC +/// +/// ! PCK0 +/// - PIN_PCK0 +/// +/// !TWI +/// - TWI_V3XX +/// - PIN_TWI_TWD0 +/// - PIN_TWI_TWCK0 +/// - PINS_TWI0 +/// - PIN_TWI_TWD1 +/// - PIN_TWI_TWCK1 +/// - PINS_TWI1 +/// +/// !USART0 +/// - PIN_USART0_RXD +/// - PIN_USART0_TXD +/// - PIN_USART0_CTS +/// - PIN_USART0_RTS +/// - PIN_USART0_SCK +/// +/// !USART1 +/// - PIN_USART1_RXD +/// - PIN_USART1_TXD +/// - PIN_USART1_CTS +/// - PIN_USART1_RTS +/// - PIN_USART1_SCK +/// +/// !USB +/// - PIN_USB_VBUS +/// +/// ADC_AD0 pin definition. +#define PIN_ADC0_AD0 {1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD1 pin definition. +#define PIN_ADC0_AD1 {1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD2 pin definition. +#define PIN_ADC0_AD2 {1 << 3, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD3 pin definition. +#define PIN_ADC0_AD3 {1 << 4, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD4 pin definition. +#define PIN_ADC0_AD4 {1 << 15, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD5 pin definition. +#define PIN_ADC0_AD5 {1 << 16, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD6 pin definition. +#define PIN_ADC0_AD6 {1 << 17, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD7 pin definition. +#define PIN_ADC0_AD7 {1 << 18, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT} + +/// Pins ADC +#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7 + +/// DBGU pins (DTXD and DRXD) definitions, PA11,12. +#define PINS_DBGU {0x00001800, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} + +/// LED #1 pin definition. +#define PIN_LED_1 {1 << 19, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT} +/// LED #2 pin definition. +#define PIN_LED_2 {1 << 18, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT} +/// List of all LEDs definitions. +#define PINS_LEDS PIN_LED_1, PIN_LED_2 + +/// SPI0 MISO pin definition. +#define PIN_SPI0_MISO {1 << 13, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +/// SPI0 MOSI pin definition. +#define PIN_SPI0_MOSI {1 << 14, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +/// SPI0 SPCK pin definition. +#define PIN_SPI0_SPCK {1 << 15, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +/// SPI0 chip select 0 pin definition. +#define PIN_SPI0_NPCS0_PA16 {1 << 16, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_SPI0_NPCS0 PIN_SPI0_NPCS0_PA16 +/// SPI0 chip select 2 pin definition. +#define PIN_SPI0_NPCS2_PC14 {1 << 14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} +/// List of SPI0 pin definitions (MISO, MOSI & SPCK). +#define PINS_SPI0 PIN_SPI0_MISO, PIN_SPI0_MOSI, PIN_SPI0_SPCK + +/// SSC pins definition. +#define PIN_SSC_TD {0x1 << 26, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_SSC_TK {0x1 << 28, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_SSC_TF {0x1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF + +/// PCK0 +#define PIN_PCK0 {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} + +/// TWI pins definition. +#define TWI_V3XX +#define PIN_TWI_TWD0 {0x1 << 9, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_TWI_TWCK0 {0x1 << 10, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0 +#define PIN_TWI_TWD1 {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_TWI_TWCK1 {0x1 << 25, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1 + +/// USART0 +#define PIN_USART0_RXD {0x1 << 19, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART0_TXD {0x1 << 18, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART0_CTS {0x1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART0_RTS {0x1 << 7, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART0_SCK {0x1 << 17, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} + +/// USART1 +#define PIN_USART1_RXD {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART1_TXD {0x1 << 20, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART1_CTS {0x1 << 23, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} +#define PIN_USART1_RTS {0x1 << 22, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} +#define PIN_USART1_SCK {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} + +/// USB VBus monitoring pin definition. +#define PIN_USB_VBUS {1 << 10, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT} + +//------------------------------------------------------------------------------ +/// \page "OsmoSDR - Memories" +/// This page lists definitions related to internal & external on-board memories. +/// +/// !Internal SRAM +/// - AT91C_ISRAM +/// - AT91C_ISRAM_SIZE + +/// !Embedded Flash +/// - AT91C_IFLASH +/// - AT91C_IFLASH_SIZE +/// - AT91C_IFLASH_PAGE_SIZE +/// - AT91C_IFLASH_NB_OF_PAGES +/// - AT91C_IFLASH_LOCK_REGION_SIZE +/// - AT91C_IFLASH_NB_OF_LOCK_BITS +/// +/// - AT91C_BASE_EFC +/// +/// !PSRAM +/// - BOARD_EBI_PSRAM +/// - BOARD_PSRAM_SIZE + +/// Internal SRAM address +#define AT91C_ISRAM AT91C_IRAM +#define AT91C_ISRAM_SIZE AT91C_IRAM_SIZE + +#define AT91C_IFLASH AT91C_IFLASH0 +#define AT91C_IFLASH_SIZE AT91C_IFLASH0_SIZE +#define AT91C_IFLASH_PAGE_SIZE AT91C_IFLASH0_PAGE_SIZE +#define AT91C_IFLASH_LOCK_REGION_SIZE AT91C_IFLASH0_LOCK_REGION_SIZE +#define AT91C_IFLASH_NB_OF_PAGES AT91C_IFLASH0_NB_OF_PAGES +#define AT91C_IFLASH_NB_OF_LOCK_BITS AT91C_IFLASH0_NB_OF_LOCK_BITS + +/// Indicates chip has an EFC. +#define AT91C_BASE_EFC AT91C_BASE_EFC0 + +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \page "OsmoSDR - Individual chip definition" +/// This page lists the definitions related to different chip's definition +/// located in the board.h file for the OsmoSDR. +/// +/// !DBGU +/// - BOARD_DBGU_ID +/// +/// !DMA +/// - BOARD_MCI_DMA_CHANNEL +/// - BOARD_LCD_DMA_CHANNEL +/// - BOARD_SSC_DMA_CHANNEL +/// - BOARD_NAND_DMA_CHANNEL +/// +/// - DMA_HW_SRC_REQ_ID_MCI0 +/// - DMA_HW_DEST_REQ_ID_MCI0 +/// - DMA_HW_SRC_REQ_ID_MCI1 +/// - DMA_HW_DEST_REQ_ID_MCI1 +/// +/// - BOARD_SD_DMA_HW_SRC_REQ_ID +/// - BOARD_SD_DMA_HW_DEST_REQ_ID +/// - BOARD_SSC_DMA_HW_SRC_REQ_ID +/// - BOARD_SSC_DMA_HW_DEST_REQ_ID +/// +/// !RTC +/// - BOARD_RTC_ID +/// +/// !Twi eeprom +/// -BOARD_ID_TWI_EEPROM +/// -BOARD_BASE_TWI_EEPROM +/// -BOARD_PINS_TWI_EEPROM +/// +/// !USART +/// -BOARD_PIN_USART_RXD +/// -BOARD_PIN_USART_TXD +/// -BOARD_PIN_USART_CTS +/// -BOARD_PIN_USART_RTS +/// -BOARD_USART_BASE +/// -BOARD_ID_USART +/// + +/// DBGU +#define BOARD_DBGU_ID AT91C_ID_DBGU + +/// Dma channel number +#define BOARD_SSC_DMA_CHANNEL 2 +/// SSC DMA hardware handshaking ID +#define BOARD_SSC_DMA_HW_SRC_REQ_ID AT91C_HDMA_SRC_PER_3 +#define BOARD_SSC_DMA_HW_DEST_REQ_ID AT91C_HDMA_DST_PER_3 + +/// USART +#define BOARD_PIN_USART_RXD PIN_USART1_RXD +#define BOARD_PIN_USART_TXD PIN_USART1_TXD +#define BOARD_PIN_USART_CTS PIN_USART1_CTS +#define BOARD_PIN_USART_RTS PIN_USART1_RTS +#define BOARD_USART_BASE AT91C_BASE_US1 +#define BOARD_ID_USART AT91C_ID_US1 + +/// Interrupt source +typedef enum IRQn +{ +/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ + NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ + MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ + BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ + SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ + SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ + +/****** AT91SAM3U4 specific Interrupt Numbers *********************************************************/ + IROn_SUPC = AT91C_ID_SUPC , // SUPPLY CONTROLLER + IROn_RSTC = AT91C_ID_RSTC , // RESET CONTROLLER + IROn_RTC = AT91C_ID_RTC , // REAL TIME CLOCK + IROn_RTT = AT91C_ID_RTT , // REAL TIME TIMER + IROn_WDG = AT91C_ID_WDG , // WATCHDOG TIMER + IROn_PMC = AT91C_ID_PMC , // PMC + IROn_EFC0 = AT91C_ID_EFC0 , // EFC0 + IROn_EFC1 = AT91C_ID_EFC1 , // EFC1 + IROn_DBGU = AT91C_ID_DBGU , // DBGU + IROn_HSMC4 = AT91C_ID_HSMC4, // HSMC4 + IROn_PIOA = AT91C_ID_PIOA , // Parallel IO Controller A + IROn_PIOB = AT91C_ID_PIOB , // Parallel IO Controller B + IROn_PIOC = AT91C_ID_PIOC , // Parallel IO Controller C + IROn_US0 = AT91C_ID_US0 , // USART 0 + IROn_US1 = AT91C_ID_US1 , // USART 1 + IROn_US2 = AT91C_ID_US2 , // USART 2 + IROn_US3 = AT91C_ID_US3 , // USART 3 + IROn_MCI0 = AT91C_ID_MCI0 , // Multimedia Card Interface + IROn_TWI0 = AT91C_ID_TWI0 , // TWI 0 + IROn_TWI1 = AT91C_ID_TWI1 , // TWI 1 + IROn_SPI0 = AT91C_ID_SPI0 , // Serial Peripheral Interface + IROn_SSC0 = AT91C_ID_SSC0 , // Serial Synchronous Controller 0 + IROn_TC0 = AT91C_ID_TC0 , // Timer Counter 0 + IROn_TC1 = AT91C_ID_TC1 , // Timer Counter 1 + IROn_TC2 = AT91C_ID_TC2 , // Timer Counter 2 + IROn_PWMC = AT91C_ID_PWMC , // Pulse Width Modulation Controller + IROn_ADCC0 = AT91C_ID_ADC12B, // ADC controller0 + IROn_ADCC1 = AT91C_ID_ADC, // ADC controller1 + IROn_HDMA = AT91C_ID_HDMA , // HDMA + IROn_UDPHS = AT91C_ID_UDPHS // USB Device High Speed +} IRQn_Type; + +//------------------------------------------------------------------------------ + +#endif //#ifndef BOARD_H + -- cgit v1.2.3