diff options
author | laforge <laforge@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2006-12-18 15:19:19 +0000 |
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committer | laforge <laforge@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2006-12-18 15:19:19 +0000 |
commit | 2b28edee6805407541a223a317beb3a0b391aad3 (patch) | |
tree | c95199ecee492cd8c4bbdcf8900d37fb8265e29a /firmware/src/picc | |
parent | b7e111098ccb1cd2cc47b73a38a056811fa69b3e (diff) |
- modify SSC code to again use tc_cdiv_sync for bitclock synchronization
git-svn-id: https://svn.openpcd.org:2342/trunk@289 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
Diffstat (limited to 'firmware/src/picc')
-rw-r--r-- | firmware/src/picc/ssc_picc.c | 11 | ||||
-rw-r--r-- | firmware/src/picc/tc_cdiv_sync.c | 68 |
2 files changed, 43 insertions, 36 deletions
diff --git a/firmware/src/picc/ssc_picc.c b/firmware/src/picc/ssc_picc.c index b7c4219..8ec6f79 100644 --- a/firmware/src/picc/ssc_picc.c +++ b/firmware/src/picc/ssc_picc.c @@ -36,6 +36,8 @@ #include <os/led.h> #include "../openpcd.h" +#include <picc/tc_cdiv_sync.h> + //#define DEBUG_SSC_REFILL /* definitions for four-times oversampling */ @@ -468,10 +470,8 @@ void ssc_rx_start(void) AT91C_SSC_RXBUFF | AT91C_SSC_OVRUN); AT91F_SSC_EnableRx(AT91C_BASE_SSC); - // Clear the flipflop - AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SSC_DATA_CONTROL); - for(int i = 0; i<0xff; i++) { } - AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SSC_DATA_CONTROL); + /* Clear the flipflop */ + tc_cdiv_sync_reset(); } void ssc_rx_stop(void) @@ -518,6 +518,9 @@ static int ssc_usb_in(struct req_ctx *rctx) void ssc_rx_init(void) { + tc_cdiv_sync_init(); + tc_cdiv_sync_enable(); + rx_pdc = (AT91PS_PDC) &(ssc->SSC_RPR); AT91F_SSC_CfgPMC(); diff --git a/firmware/src/picc/tc_cdiv_sync.c b/firmware/src/picc/tc_cdiv_sync.c index b87d9e5..e83ae88 100644 --- a/firmware/src/picc/tc_cdiv_sync.c +++ b/firmware/src/picc/tc_cdiv_sync.c @@ -1,73 +1,77 @@ /* Synchronize TC_CDIV divided sample clock with the SOF of the packet */ -#define PIO_DATA AT91C_PIO_PA27 - #include <lib_AT91SAM7.h> #include <AT91SAM7.h> #include <os/dbgu.h> #include "../openpcd.h" //#define USE_IRQ -#define DISABLE static u_int8_t enabled; static void pio_data_change(u_int32_t pio) { - /* FIXME: start ssc if we're in one-shot mode */ - //ssc_rx_start(); + DEBUGP("PIO_FRAME_IRQ: "); + /* we get one interrupt for each change. If now, after the + * change the level is high, then it must have been a rising + * edge */ + if (*AT91C_PIOA_PDSR & OPENPICC_PIO_FRAME) { + *AT91C_TC0_CCR = AT91C_TC_SWTRG; + DEBUGPCR("CDIV_SYNC_FLIP SWTRG CV=0x%08x", + *AT91C_TC0_CV); + } else + DEBUGPCR(""); } +#if 0 static void __ramfunc cdsync_cb(void) { - if (*AT91C_PIOA_ISR & PIO_DATA) { + DEBUGP("PIO_IRQ: "); + if (*AT91C_PIOA_ISR & OPENPICC_PIO_FRAME) { + DEBUGP("PIO_FRAME_IRQ: "); /* we get one interrupt for each change. If now, after the - * change the level is low, then it must have been a falling + * change the level is high, then it must have been a rising * edge */ - if (*AT91C_PIOA_PDSR & PIO_DATA) { + if (*AT91C_PIOA_PDSR & OPENPICC_PIO_FRAME) { *AT91C_TC0_CCR = AT91C_TC_SWTRG; - DEBUGP("SWTRG CV=0x%08x ", *AT91C_TC0_CV); -#ifdef DISABLE - DEBUGP("CDIV_SYNC_FLIP "); - //now in fiq *AT91C_PIOA_IDR = PIO_DATA; -#endif - //ssc_rx_start(); - } - } -#if 0 - AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_PIOA); - AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_FIQ); -#endif - DEBUGPCR(""); + DEBUGPCR("CDIV_SYNC_FLIP SWTRG CV=0x%08x", + *AT91C_TC0_CV); + } else + DEBUGPCR(""); + } else + DEBUGPCR(""); } +#endif -/* re-enable cdiv_sync FIQ after it has been disabled by our one-shot logic */ void tc_cdiv_sync_reset(void) { -#ifdef DISABLE if (enabled) { u_int32_t tmp = *AT91C_PIOA_ISR; - DEBUGP("CDIV_SYNC_FLOP "); - *AT91C_PIOA_IER = PIO_DATA; + volatile int i; + DEBUGPCRF("CDIV_SYNC_FLOP"); + + /* reset the hardware flipflop */ + AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, + OPENPICC_PIO_SSC_DATA_CONTROL); + for (i = 0; i < 0xff; i++) ; + AT91F_PIO_SetOutput(AT91C_BASE_PIOA, + OPENPICC_PIO_SSC_DATA_CONTROL); } -#endif } void tc_cdiv_sync_disable(void) { enabled = 0; - *AT91C_PIOA_IDR = PIO_DATA; + *AT91C_PIOA_IDR = OPENPICC_PIO_FRAME; } void tc_cdiv_sync_enable(void) { enabled = 1; - DEBUGP("CDIV_SYNC_ENABLE "); + DEBUGPCRF("CDIV_SYNC_ENABLE "); tc_cdiv_sync_reset(); -#ifndef DISABLE - *AT91C_PIOA_IER = PIO_DATA; -#endif + *AT91C_PIOA_IER = OPENPICC_PIO_FRAME; } extern void (*fiq_handler)(void); @@ -93,7 +97,7 @@ void tc_cdiv_sync_init(void) *AT91C_AIC_FFER = (1 << AT91C_ID_PIOA); /* register pio irq handler */ - pio_irq_register(PIO_DATA, &pio_data_change); + pio_irq_register(OPENPICC_PIO_FRAME, &pio_data_change); #endif AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_PIOA); |