diff options
| author | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2007-12-12 01:50:14 +0000 |
|---|---|---|
| committer | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2007-12-12 01:50:14 +0000 |
| commit | 202b56a42c5e6a171ee43b469be48525d0e8e350 (patch) | |
| tree | 84260eadbedd8575f158b95a43c3a481c35362ec /hardware/QRC0001_UALside2.pdf | |
| parent | 3d0e1db9d118f85441a9d559ba2fa7baa7195eee (diff) | |
Add new miller decoder (not working yet)
Vastly improve timing through CPU cycle counting. Jitter is now like 40ns (the SSC_DATA edge detection fuzziness) in 2 main clusters 4 CPU cycles (83ns) apart, plus an occasional glitch adding 4 CPU cycles in either direction
git-svn-id: https://svn.openpcd.org:2342/trunk@385 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
Diffstat (limited to 'hardware/QRC0001_UALside2.pdf')
0 files changed, 0 insertions, 0 deletions