diff options
author | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2007-12-12 01:50:14 +0000 |
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committer | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2007-12-12 01:50:14 +0000 |
commit | 202b56a42c5e6a171ee43b469be48525d0e8e350 (patch) | |
tree | 84260eadbedd8575f158b95a43c3a481c35362ec /openpicc/application/iso14443_layer3a.h | |
parent | 3d0e1db9d118f85441a9d559ba2fa7baa7195eee (diff) |
Add new miller decoder (not working yet)
Vastly improve timing through CPU cycle counting. Jitter is now like 40ns (the SSC_DATA edge detection fuzziness) in 2 main clusters 4 CPU cycles (83ns) apart, plus an occasional glitch adding 4 CPU cycles in either direction
git-svn-id: https://svn.openpcd.org:2342/trunk@385 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
Diffstat (limited to 'openpicc/application/iso14443_layer3a.h')
-rw-r--r-- | openpicc/application/iso14443_layer3a.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/openpicc/application/iso14443_layer3a.h b/openpicc/application/iso14443_layer3a.h index 495ca2e..26a8a2d 100644 --- a/openpicc/application/iso14443_layer3a.h +++ b/openpicc/application/iso14443_layer3a.h @@ -16,21 +16,6 @@ enum ISO14443_STATES { }; /******************** RX ************************************/ -/* Magic delay, don't know where it comes from */ -#define MAGIC_OFFSET -32 -/* Delay from modulation till detection in SSC_DATA */ -#define DETECTION_DELAY 11 -/* See fdt_timinig.dia for these values */ -#define MAX_TF_FIQ_ENTRY_DELAY 16 -#define MAX_TF_FIQ_OVERHEAD 75 /* guesstimate */ -extern volatile int fdt_offset; -/* standard derived magic values */ -#define ISO14443A_FDT_SLOTLEN 128 -#define ISO14443A_FDT_OFFSET_1 84 -#define ISO14443A_FDT_OFFSET_0 20 -#define ISO14443A_FDT_SHORT_1 (ISO14443A_FDT_SLOTLEN*9 + ISO14443A_FDT_OFFSET_1 +fdt_offset +MAGIC_OFFSET -DETECTION_DELAY) -#define ISO14443A_FDT_SHORT_0 (ISO14443A_FDT_SLOTLEN*9 + ISO14443A_FDT_OFFSET_0 +fdt_offset +MAGIC_OFFSET -DETECTION_DELAY) - #ifdef FOUR_TIMES_OVERSAMPLING /* definitions for four-times oversampling */ /* Sample values for the REQA and WUPA short frames */ @@ -82,6 +67,21 @@ extern volatile int fdt_offset; #endif /******************** TX ************************************/ +/* Magic delay, don't know where it comes from */ +#define MAGIC_OFFSET -32 +/* Delay from modulation till detection in SSC_DATA */ +#define DETECTION_DELAY 11 +/* See fdt_timinig.dia for these values */ +#define MAX_TF_FIQ_ENTRY_DELAY 16 +#define MAX_TF_FIQ_OVERHEAD 75 /* guesstimate */ +extern volatile int fdt_offset; +/* standard derived magic values */ +#define ISO14443A_FDT_SLOTLEN 128 +#define ISO14443A_FDT_OFFSET_1 84 +#define ISO14443A_FDT_OFFSET_0 20 +#define ISO14443A_FDT_SHORT_1 (ISO14443A_FDT_SLOTLEN*9 + ISO14443A_FDT_OFFSET_1 +fdt_offset +MAGIC_OFFSET -DETECTION_DELAY) +#define ISO14443A_FDT_SHORT_0 (ISO14443A_FDT_SLOTLEN*9 + ISO14443A_FDT_OFFSET_0 +fdt_offset +MAGIC_OFFSET -DETECTION_DELAY) + /* in bytes, not counting parity */ #define MAXIMUM_FRAME_SIZE 256 |