diff options
| author | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2007-12-05 15:36:56 +0000 |
|---|---|---|
| committer | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2007-12-05 15:36:56 +0000 |
| commit | ba63352b4b915e46bc44fbd98c6e0e837477005d (patch) | |
| tree | 6d49eaab495d2fa9a8d8ebda9922b0ceeacac84f /openpicc/application/ssc_picc.h | |
| parent | 1cdcc383d801f6468e2937475be3b98af231f4cf (diff) | |
Revamp SSC buffer handling, should severely reduce buffer leakage
Switch SSC IRQ handling from edge triggered to level triggered. Somehow I was losing the ENDTX interrupt otherwise
Modified ISO14443 code for testing to enable repeated REQA->ATQA cycles. Somehow only the first ATQA is correct, subsequent ATQAs are missing the first two bits. Need to debug
git-svn-id: https://svn.openpcd.org:2342/trunk@373 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
Diffstat (limited to 'openpicc/application/ssc_picc.h')
| -rw-r--r-- | openpicc/application/ssc_picc.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/openpicc/application/ssc_picc.h b/openpicc/application/ssc_picc.h index bd08a73..d141e44 100644 --- a/openpicc/application/ssc_picc.h +++ b/openpicc/application/ssc_picc.h @@ -38,7 +38,7 @@ typedef void (*ssc_irq_ext_t)(u_int32_t ssc_sr, enum ssc_mode ssc_mode, u_int8_t * than acceptable for the synchronous responses (around 87us).*/ extern ssc_irq_ext_t ssc_set_irq_extension(ssc_irq_ext_t ext_handler); -extern portBASE_TYPE ssc_get_overflows(void); +extern int ssc_get_overflows(void); extern int ssc_count_free(void); #define SSC_DMA_BUFFER_SIZE 2048 @@ -55,7 +55,7 @@ typedef enum { typedef struct { volatile ssc_dma_buffer_state_t state; u_int32_t len; /* Length of the content */ - enum ssc_mode reception_mode; + enum ssc_mode reception_mode; /* The SSC mode that the buffer has been loaded for (affects element size and count) */ u_int8_t data[SSC_DMA_BUFFER_SIZE]; } ssc_dma_rx_buffer_t; |