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authorhenryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1>2007-12-09 06:10:56 +0000
committerhenryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1>2007-12-09 06:10:56 +0000
commitceb643380b02d0d8289e3ad75a495123414ace8c (patch)
treecf37628d2b07d7cebc2a4f04d5f8ea2488eb9d57 /openpicc/application/tc_cdiv.c
parentbdc39aadd1a26d7709ff15722be90c016be2057a (diff)
Prevent late frames by spinning in SSC CP0 IRQ till end of short frame reception
Fix tc_cdiv_set_divider. again. Reverse the polarity! (of the ssc transmit clock) git-svn-id: https://svn.openpcd.org:2342/trunk@381 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
Diffstat (limited to 'openpicc/application/tc_cdiv.c')
-rw-r--r--openpicc/application/tc_cdiv.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/openpicc/application/tc_cdiv.c b/openpicc/application/tc_cdiv.c
index d389214..08b8efe 100644
--- a/openpicc/application/tc_cdiv.c
+++ b/openpicc/application/tc_cdiv.c
@@ -27,11 +27,12 @@
#include "openpicc.h"
#include "tc_cdiv.h"
+#include "led.h"
AT91PS_TCB tcb = AT91C_BASE_TCB;
/* set carrier divider to a specific */
-void tc_cdiv_set_divider(u_int16_t div)
+void __ramfunc tc_cdiv_set_divider(u_int16_t div)
{
tcb->TCB_TC0.TC_RC = div;
@@ -43,11 +44,13 @@ void tc_cdiv_set_divider(u_int16_t div)
* In order to not lose phase information when doing that we'll busy wait till CV is
* zero modulo the new RC.*/
/*tc_cdiv_phase_add(tcb->TCB_TC0.TC_RC-(tcb->TCB_TC0.TC_CV%tcb->TCB_TC0.TC_RC));*/
- if(tcb->TCB_TC0.TC_CV > div) while(tcb->TCB_TC0.TC_CV % div != 0);
- tcb->TCB_TC0.TC_CCR = AT91C_TC_SWTRG;
+ if(tcb->TCB_TC0.TC_CV > div) {
+ while(tcb->TCB_TC0.TC_CV % div != 0);
+ tcb->TCB_TC0.TC_CCR = AT91C_TC_SWTRG;
+ }
}
-void tc_cdiv_phase_add(int16_t inc)
+void __ramfunc tc_cdiv_phase_add(int16_t inc)
{
tcb->TCB_TC0.TC_RA = (tcb->TCB_TC0.TC_RA + inc) % tcb->TCB_TC0.TC_RC;
tcb->TCB_TC0.TC_RB = (tcb->TCB_TC0.TC_RB + inc) % tcb->TCB_TC0.TC_RC;
personal git repositories of Harald Welte. Your mileage may vary