diff options
| author | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2007-12-04 19:40:33 +0000 |
|---|---|---|
| committer | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2007-12-04 19:40:33 +0000 |
| commit | f00879830b776cbc3fbeddfb4c97473d99cba904 (patch) | |
| tree | ef76b9d5ce4d18832dcfd0cff25d5098ddfdf759 /openpicc/application | |
| parent | bc63ec765eb2597047132c00d5cfc925fdec95c5 (diff) | |
Change tc_cdiv_set_divider. The new code seems to work nearly perfect (jitter is now near 1 sample for the fdt of 1172)
git-svn-id: https://svn.openpcd.org:2342/trunk@371 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
Diffstat (limited to 'openpicc/application')
| -rw-r--r-- | openpicc/application/tc_cdiv.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/openpicc/application/tc_cdiv.c b/openpicc/application/tc_cdiv.c index 3bbfe77..d389214 100644 --- a/openpicc/application/tc_cdiv.c +++ b/openpicc/application/tc_cdiv.c @@ -39,8 +39,11 @@ void tc_cdiv_set_divider(u_int16_t div) tcb->TCB_TC0.TC_RA = 1; tcb->TCB_TC0.TC_RB = 1 + (div >> 1); - /* Save current CV as phase, then reset to 0 (might otherwise be greater than RC) */ - tc_cdiv_phase_add(tcb->TCB_TC0.TC_RC-(tcb->TCB_TC0.TC_CV%tcb->TCB_TC0.TC_RC)); + /* We must reset CV to zero when it was greater than RC. + * In order to not lose phase information when doing that we'll busy wait till CV is + * zero modulo the new RC.*/ + /*tc_cdiv_phase_add(tcb->TCB_TC0.TC_RC-(tcb->TCB_TC0.TC_CV%tcb->TCB_TC0.TC_RC));*/ + if(tcb->TCB_TC0.TC_CV > div) while(tcb->TCB_TC0.TC_CV % div != 0); tcb->TCB_TC0.TC_CCR = AT91C_TC_SWTRG; } |