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-rw-r--r--openpicc/application/cmd.c11
-rw-r--r--openpicc/application/iso14443_layer3a.c4
-rw-r--r--openpicc/application/iso14443_layer3a.h27
-rw-r--r--openpicc/application/main.c7
-rw-r--r--openpicc/application/openpicc.h1
-rw-r--r--openpicc/application/pio_irq.c4
-rw-r--r--openpicc/application/ssc_picc.c23
-rw-r--r--openpicc/os/boot/Cstartup_SAM7.c7
-rw-r--r--openpicc/os/boot/boot.s78
-rw-r--r--openpicc/os/core/ARM7_AT91SAM7S/portISR.c4
-rw-r--r--openpicc/os/core/ARM7_AT91SAM7S/portmacro.h2
11 files changed, 131 insertions, 37 deletions
diff --git a/openpicc/application/cmd.c b/openpicc/application/cmd.c
index dba4e3e..d8a88df 100644
--- a/openpicc/application/cmd.c
+++ b/openpicc/application/cmd.c
@@ -256,6 +256,17 @@ void prvExecCommand(u_int32_t cmd, portCHAR *args) {
DumpStringToUSB(" * SSC status: ");
DumpUIntToUSB(AT91C_BASE_SSC->SSC_SR);
DumpStringToUSB("\n\r");
+ DumpStringToUSB(" * TC0_CV value: ");
+ DumpUIntToUSB(*AT91C_TC0_CV);
+ DumpStringToUSB("\n\r");
+ DumpStringToUSB(" * SSC_RCMR value: ");
+ DumpUIntToUSB(*AT91C_SSC_RCMR);
+ DumpStringToUSB("\n\r");
+ DumpStringToUSB(" * is remapped?: ");
+ DumpStringToUSB( (*(int*)0x00100100 == *(int*)0x00000100) ? "no" :
+ ((*(int*)0x00200100 == *(int*)0x00000100) ? "yes" : "foo")
+ );
+ DumpStringToUSB("\n\r");
DumpStringToUSB(
" *\n\r"
" *****************************************************\n\r"
diff --git a/openpicc/application/iso14443_layer3a.c b/openpicc/application/iso14443_layer3a.c
index 8a6abac..8dd9cd2 100644
--- a/openpicc/application/iso14443_layer3a.c
+++ b/openpicc/application/iso14443_layer3a.c
@@ -91,7 +91,11 @@ void iso14443_layer3a_state_machine (void *pvParameters)
pll_init();
tc_cdiv_init();
+#ifdef FOUR_TIMES_OVERSAMPLING
tc_cdiv_set_divider(32);
+#else
+ tc_cdiv_set_divider(64);
+#endif
tc_fdt_init();
#if 0
ssc_tx_init();
diff --git a/openpicc/application/iso14443_layer3a.h b/openpicc/application/iso14443_layer3a.h
index 396ebe9..f76a514 100644
--- a/openpicc/application/iso14443_layer3a.h
+++ b/openpicc/application/iso14443_layer3a.h
@@ -15,4 +15,31 @@ enum ISO14443_STATES {
ERROR, /* Some unrecoverable error has occured */
};
+/* standard derived magic values */
+#define ISO14443A_FDT_SHORT_1 1236
+#define ISO14443A_FDT_SHORT_0 1172
+
+#ifdef FOUR_TIMES_OVERSAMPLING
+/* definitions for four-times oversampling */
+/* Sample values for the REQA and WUPA short frames */
+#define REQA 0x10410441
+#define WUPA 0x04041041
+
+/* Start of frame sample for SSC compare 0 */
+#define ISO14443A_SOF_SAMPLE 0x01
+#define ISO14443A_SOF_LEN 4
+/* Length in samples of a short frame */
+#define ISO14443A_SHORT_LEN 32
+
+#else
+/* definitions for two-times oversampling */
+#define REQA 0x18729
+#define WUPA 0x2249
+
+#define ISO14443A_SOF_SAMPLE 0x01
+#define ISO14443A_SOF_LEN 2
+#define ISO14443A_SHORT_LEN 16
+
+#endif
+
#endif /*ISO14443_LAYER3A_H_*/
diff --git a/openpicc/application/main.c b/openpicc/application/main.c
index b739f34..37cc24a 100644
--- a/openpicc/application/main.c
+++ b/openpicc/application/main.c
@@ -88,7 +88,7 @@ void vApplicationIdleHook(void)
void main_help_print_buffer(ssc_dma_buffer_t *buffer, int *pktcount)
{
- u_int32_t *tmp = (u_int32_t*)buffer->data;
+ u_int16_t *tmp = (u_int16_t*)buffer->data;
int i, dumped = 0;
unsigned int j;
for(i = buffer->len / sizeof(*tmp); i >= 0 ; i--) {
@@ -163,7 +163,10 @@ int main (void)
vCmdInit();
- //vLedSetGreen(1);
+ //vLedSetGreen(1);
+
+ /* Remap RAM to addr 0 */
+ AT91C_BASE_MC->MC_RCR = AT91C_MC_RCB;
vTaskStartScheduler ();
diff --git a/openpicc/application/openpicc.h b/openpicc/application/openpicc.h
index 15f9143..fc2c4d8 100644
--- a/openpicc/application/openpicc.h
+++ b/openpicc/application/openpicc.h
@@ -38,4 +38,5 @@ typedef int s_int32_t;
#define DA_BASELINE 200
+
#endif/*__OPENPICC_H__*/
diff --git a/openpicc/application/pio_irq.c b/openpicc/application/pio_irq.c
index 73dbae5..a92ceaa 100644
--- a/openpicc/application/pio_irq.c
+++ b/openpicc/application/pio_irq.c
@@ -148,7 +148,9 @@ void pio_irq_init_once(void)
}
#define USE_FIQ
+extern void my_fiq_handler(void);
extern void fiq_handler(void);
+
void pio_irq_init(void)
{
initialized = 1;
@@ -156,7 +158,7 @@ void pio_irq_init(void)
#ifdef USE_FIQ
AT91F_AIC_ConfigureIt(AT91C_ID_FIQ,
//0, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &cdsync_cb);
- 0, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &fiq_handler);
+ 0, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, &my_fiq_handler);
/* enable fast forcing for PIOA interrupt */
*AT91C_AIC_FFER = (1 << AT91C_ID_PIOA);
#else
diff --git a/openpicc/application/ssc_picc.c b/openpicc/application/ssc_picc.c
index 3dbc246..acdf9ae 100644
--- a/openpicc/application/ssc_picc.c
+++ b/openpicc/application/ssc_picc.c
@@ -45,13 +45,10 @@
#include "tc_fdt.h"
#include "usb_print.h"
+#include "iso14443_layer3a.h"
//#define DEBUG_SSC_REFILL
-/* definitions for four-times oversampling */
-#define REQA 0x10410441
-#define WUPA 0x04041041
-
static const AT91PS_SSC ssc = AT91C_BASE_SSC;
static AT91PS_PDC rx_pdc;
@@ -91,10 +88,6 @@ static const u_int16_t ssc_dmasize[] = {
[SSC_MODE_CONTINUOUS] = 511, /* 2044 bytes */
};
-/* This is for four-times oversampling */
-#define ISO14443A_SOF_SAMPLE 0x01
-#define ISO14443A_SOF_LEN 4
-
#define SSC_RX_IRQ_MASK (AT91C_SSC_RXRDY | \
AT91C_SSC_OVRUN | \
AT91C_SSC_ENDRX | \
@@ -109,6 +102,9 @@ static const u_int16_t ssc_dmasize[] = {
AT91C_SSC_TXBUFE | \
AT91C_SSC_TXSYN)
+/* This stores the value that SSC_RCMR should be set to when a frame start is detected.
+ * Will be used in my_fiq_handler in os/boot/boot.s */
+u_int32_t ssc_rcmr_on_start = 0;
void ssc_rx_mode_set(enum ssc_mode ssc_mode)
{
u_int8_t data_len=0, num_data=0, sync_len=0;
@@ -123,7 +119,7 @@ void ssc_rx_mode_set(enum ssc_mode ssc_mode)
start_cond = AT91C_SSC_START_0;
sync_len = ISO14443A_SOF_LEN;
ssc->SSC_RC0R = ISO14443A_SOF_SAMPLE;
- data_len = 32;
+ data_len = ISO14443A_SHORT_LEN;
num_data = 16;
break;
case SSC_MODE_14443A_STANDARD:
@@ -283,9 +279,6 @@ static int __ramfunc __ssc_rx_refill(int secondary)
return 0;
}
-#define ISO14443A_FDT_SHORT_1 1236
-#define ISO14443A_FDT_SHORT_0 1172
-
static void __ramfunc ssc_irq_short_inner(void) __attribute__ ((naked));
static void __ramfunc ssc_irq_short_inner(void)
{
@@ -458,7 +451,11 @@ static void __ramfunc ssc_irq(void)
if (ssc_sr & AT91C_SSC_RXSYN)
DEBUGP("RXSYN ");
if (ssc_sr & AT91C_SSC_RXRDY) {
- u_int32_t sample = ssc->SSC_RHR;
+ u_int32_t sample = ssc->SSC_RHR;
+ int i = usb_print_set_default_flush(0);
+ DumpUIntToUSB(sample);
+ DumpStringToUSB("\n\r");
+ usb_print_set_default_flush(i);
DEBUGP("RXRDY=0x%08x ", sample);
/* Try to set FDT compare register ASAP */
if (sample == REQA) {
diff --git a/openpicc/os/boot/Cstartup_SAM7.c b/openpicc/os/boot/Cstartup_SAM7.c
index fdcafd3..88af706 100644
--- a/openpicc/os/boot/Cstartup_SAM7.c
+++ b/openpicc/os/boot/Cstartup_SAM7.c
@@ -17,6 +17,8 @@
// Include the board file description
#include <board.h>
+// For memcpy
+#include <string.h>
//*----------------------------------------------------------------------------
//* \fn AT91F_LowLevelInit
@@ -26,7 +28,6 @@
//*----------------------------------------------------------------------------
void AT91F_LowLevelInit (void)
{
- char i=0;
AT91PS_PMC pPMC = AT91C_BASE_PMC;
//* Set flash wait state
@@ -67,8 +68,8 @@ void AT91F_LowLevelInit (void)
pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
while (!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
- /* Copy IRQ vector table to RAM */
- for(i=0; i<0x24; i++) *((char*)(0x00200000)+i) = *((char*)(0x00100000)+i);
+ /* Copy first 0x100 bytes (IRQ vector table and FIQ) to RAM */
+ memcpy((void*)0x00200000, (void*)0x00100000, 0x100);
/* Perform remap FIXME doesn't work*/
// AT91C_BASE_MC->MC_RCR = AT91C_MC_RCB;
}
diff --git a/openpicc/os/boot/boot.s b/openpicc/os/boot/boot.s
index f75bed1..8faf7f3 100644
--- a/openpicc/os/boot/boot.s
+++ b/openpicc/os/boot/boot.s
@@ -3,6 +3,7 @@
.extern main
.extern exit
.extern AT91F_LowLevelInit
+ .extern ssc_rcmr_on_start
.text
.code 32
@@ -43,7 +44,10 @@
.equ AT91C_BASE_MC, (0xFFFFFF00)
.equ AT91C_BASE_PIOA, 0xFFFFF400
.equ AT91C_BASE_TC0, 0xFFFA0000
+.equ AT91C_BASE_SSC, 0xFFFD4000
+.equ SSC_RCMR, 0x10
.equ AT91C_TC_SWTRG, (1 << 2)
+.equ AT91C_TC_CLKEN, (1 << 0)
.equ PIO_DATA, (1 << 27)
.equ PIOA_SODR, 0x30
.equ PIOA_CODR, 0x34
@@ -52,10 +56,15 @@
.equ PIOA_ISR, 0x4c
.equ TC_CCR, 0x00
.equ AIC_EOICR, (304)
-/*.equ PIO_LED1, (1 << 25)*/
-.equ PIO_LED1, (1 << 12)
+.equ PIO_LED1, (1 << 25)
+.equ PIO_LED2, (1 << 12)
.equ MC_RCR, 0xFFFFFF00
+/* FIQ latency is approx 1us. At 13.56 MHz carrier frequency this means that
+ * 13.56 cycles of the carrier have passed when the FIQ kicks in and this is
+ * the amount that CV0 should be loaded to. (Round up) */
+.equ TC0_FRAME_OFFSET, 9
+
start:
_start:
_mainCRTStartup:
@@ -76,6 +85,7 @@ _mainCRTStartup:
ldr r12, =AT91C_BASE_TC0
ldr r8, =AT91C_BASE_AIC
mov r9, #AT91C_TC_SWTRG
+ /*ldr r9, =AT91C_BASE_SSC*/
mov sp, r0
sub r0, r0, #FIQ_STACK_SIZE
msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
@@ -128,16 +138,6 @@ _mainCRTStartup:
.end_set_loop:
- /* Load absolute address and jump there to get from pc=0x0000... to pc=0x0010... */
- ldr lr, _here
- bx lr
-
-.here:
- /* Perform remap FIXME doesn't work (not even the absolute jump above seems to help)*/
- /*ldr r0, =AT91C_BASE_MC
- mov r1, #0x01
- str r1, [r0, #0]*/
-
/* call main */
mov r0, #0 /* no arguments */
mov r1, #0 /* no argv either */
@@ -145,9 +145,6 @@ _mainCRTStartup:
ldr lr, =main
bx lr
-_here:
- .word .here
-
endless_loop:
b endless_loop
@@ -263,4 +260,55 @@ fiq_handler:
.size fiq_handler, . - fiq_handler
.endfunc
+
+ .global my_fiq_handler
+ .func my_fiq_handler
+my_fiq_handler:
+ /* code that uses pre-initialized FIQ reg */
+ /* r8 AT91C_BASE_AIC (dfu init)
+ r9 AT91C_TC_SWTRG
+ //r9 AT91C_BASE_SSC
+ r10 AT91C_BASE_PIOA
+ r11 tmp
+ r12 AT91C_BASE_TC0
+ r13 stack
+ r14 lr
+ */
+
+#ifdef LED_TRIGGER
+ mov r11, #PIO_LED1
+ str r11, [r10, #PIOA_CODR] /* enable LED */
+#endif
+ ldr r8, [r10, #PIOA_ISR]
+ tst r8, #PIO_DATA /* check for PIO_DATA change */
+ ldrne r11, [r10, #PIOA_PDSR]
+ tstne r11, #PIO_DATA /* check for PIO_DATA == 1 */
+ strne r9, [r12, #TC_CCR] /* software trigger */
+ /*movne r11, #TC0_FRAME_OFFSET
+ strne r11, [r12, #0x10] /* Set TC0_CV to TC0_FRAME_OFFSET */
+
+ /* Enable SSC Rx clock from RK */
+ /*ldrne r11, =ssc_rcmr_on_start
+ ldrne r11, [r11]
+ strne r11, [r9, #SSC_RCMR]*/
+
+ movne r11, #PIO_DATA
+ strne r11, [r10, #PIOA_IDR] /* disable further PIO_DATA FIQ */
+
+#ifdef LED_TRIGGER
+ mov r11, #PIO_LED1
+ str r11, [r10, #PIOA_SODR] /* disable LED */
+#endif
+
+ /*- Mark the End of Interrupt on the AIC */
+ ldr r11, =AT91C_BASE_AIC
+ str r11, [r11, #AIC_EOICR]
+
+ /*- Restore the Program Counter using the LR_fiq directly in the PC */
+ subs pc, lr, #4
+
+ .size my_fiq_handler, . - my_fiq_handler
+ .endfunc
+
.end
+
diff --git a/openpicc/os/core/ARM7_AT91SAM7S/portISR.c b/openpicc/os/core/ARM7_AT91SAM7S/portISR.c
index 507712e..6f92c24 100644
--- a/openpicc/os/core/ARM7_AT91SAM7S/portISR.c
+++ b/openpicc/os/core/ARM7_AT91SAM7S/portISR.c
@@ -178,7 +178,7 @@ vPortDisableInterruptsFromThumb (void)
{
asm volatile ("STMDB SP!, {R0} \n\t" /* Push R0. */
"MRS R0, CPSR \n\t" /* Get CPSR. */
- "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
+ "ORR R0, R0, #0x80 \n\t" /* Disable IRQ, don't disable FIQ. */
"MSR CPSR, R0 \n\t" /* Write back modified value. */
"LDMIA SP!, {R0} \n\t" /* Pop R0. */
"BX R14"); /* Return back to thumb. */
@@ -206,7 +206,7 @@ vPortEnterCritical (void)
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
asm volatile ("STMDB SP!, {R0} \n\t" /* Push R0. */
"MRS R0, CPSR \n\t" /* Get CPSR. */
- "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
+ "ORR R0, R0, #0x80 \n\t" /* Disable IRQ, don't disable FIQ. */
"MSR CPSR, R0 \n\t" /* Write back modified value. */
"LDMIA SP!, {R0}"); /* Pop R0. */
diff --git a/openpicc/os/core/ARM7_AT91SAM7S/portmacro.h b/openpicc/os/core/ARM7_AT91SAM7S/portmacro.h
index 6b25ec5..da980a7 100644
--- a/openpicc/os/core/ARM7_AT91SAM7S/portmacro.h
+++ b/openpicc/os/core/ARM7_AT91SAM7S/portmacro.h
@@ -238,7 +238,7 @@ extern void vPortEnableInterruptsFromThumb (void) __attribute__ ((naked));
asm volatile ( \
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
"MRS R0, CPSR \n\t" /* Get CPSR. */ \
- "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
+ "ORR R0, R0, #0x80 \n\t" /* Disable IRQ, don't diable FIQ. */ \
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \
"LDMIA SP!, {R0} " ) /* Pop R0. */
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