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-rw-r--r--firmware/src/simtrace/iso7816_uart.c56
-rw-r--r--firmware/src/simtrace/main_factory.c2
-rw-r--r--firmware/src/simtrace/prod_info.c20
-rw-r--r--firmware/src/simtrace/prod_info.h4
-rw-r--r--firmware/src/simtrace/sim_switch.c4
-rw-r--r--firmware/src/simtrace/spi_flash.c64
-rw-r--r--firmware/src/simtrace/spi_flash.h10
-rw-r--r--firmware/src/simtrace/tc_etu.c14
-rw-r--r--firmware/src/simtrace/tc_etu.h4
9 files changed, 89 insertions, 89 deletions
diff --git a/firmware/src/simtrace/iso7816_uart.c b/firmware/src/simtrace/iso7816_uart.c
index 9e8ace9..aa85d6e 100644
--- a/firmware/src/simtrace/iso7816_uart.c
+++ b/firmware/src/simtrace/iso7816_uart.c
@@ -85,22 +85,22 @@ enum pts_state {
struct iso7816_3_handle {
enum iso7816_3_state state;
- u_int8_t fi;
- u_int8_t di;
- u_int8_t wi;
- u_int32_t waiting_time;
+ uint8_t fi;
+ uint8_t di;
+ uint8_t wi;
+ uint32_t waiting_time;
enum atr_state atr_state;
- u_int8_t atr_idx;
- u_int8_t atr_hist_len;
- u_int8_t atr_last_td;
- u_int8_t atr[64];
+ uint8_t atr_idx;
+ uint8_t atr_hist_len;
+ uint8_t atr_last_td;
+ uint8_t atr[64];
- u_int16_t prot_t_supported;
+ uint16_t prot_t_supported;
enum pts_state pts_state;
- u_int8_t pts_req[6];
- u_int8_t pts_resp[6];
+ uint8_t pts_req[6];
+ uint8_t pts_resp[6];
struct simtrace_hdr sh;
@@ -114,13 +114,13 @@ struct iso7816_3_handle isoh;
/* Table 6 from ISO 7816-3 */
-static const u_int16_t fi_table[] = {
+static const uint16_t fi_table[] = {
372, 372, 558, 744, 1116, 1488, 1860, 0,
0, 512, 768, 1024, 1536, 2048, 0, 0
};
/* Table 7 from ISO 7816-3 */
-static const u_int8_t di_table[] = {
+static const uint8_t di_table[] = {
0, 1, 2, 4, 8, 16, 32, 64,
12, 20, 2, 4, 8, 16, 32, 64,
};
@@ -154,9 +154,9 @@ struct simtrace_stats *iso_uart_stats_get(void)
}
/* compute the F/D ratio based on Fi and Di values */
-static int compute_fidi_ratio(u_int8_t fi, u_int8_t di)
+static int compute_fidi_ratio(uint8_t fi, uint8_t di)
{
- u_int16_t f, d;
+ uint16_t f, d;
int ret;
if (fi >= ARRAY_SIZE(fi_table) ||
@@ -314,7 +314,7 @@ transition_to_tck(struct iso7816_3_handle *ih)
}
/* determine the next ATR state based on received interface byte */
-static enum atr_state next_intb_state(struct iso7816_3_handle *ih, u_int8_t ch)
+static enum atr_state next_intb_state(struct iso7816_3_handle *ih, uint8_t ch)
{
switch (ih->atr_state) {
case ATR_S_WAIT_TD:
@@ -359,7 +359,7 @@ from_tc:
/* process an incomng ATR byte */
static enum iso7816_3_state
-process_byte_atr(struct iso7816_3_handle *ih, u_int8_t byte)
+process_byte_atr(struct iso7816_3_handle *ih, uint8_t byte)
{
/* add byte to ATR buffer */
ih->atr[ih->atr_idx] = byte;
@@ -412,9 +412,9 @@ static void set_pts_state(struct iso7816_3_handle *ih, enum pts_state new_ptss)
/* Determine the next PTS state */
static enum pts_state next_pts_state(struct iso7816_3_handle *ih)
{
- u_int8_t is_resp = ih->pts_state & 0x10;
- u_int8_t sstate = ih->pts_state & 0x0f;
- u_int8_t *pts_ptr;
+ uint8_t is_resp = ih->pts_state & 0x10;
+ uint8_t sstate = ih->pts_state & 0x0f;
+ uint8_t *pts_ptr;
if (!is_resp)
pts_ptr = ih->pts_req;
@@ -453,7 +453,7 @@ from_pts3:
}
static enum iso7816_3_state
-process_byte_pts(struct iso7816_3_handle *ih, u_int8_t byte)
+process_byte_pts(struct iso7816_3_handle *ih, uint8_t byte)
{
switch (ih->pts_state) {
case PTS_S_WAIT_REQ_PTSS:
@@ -510,7 +510,7 @@ process_byte_pts(struct iso7816_3_handle *ih, u_int8_t byte)
return ISO7816_S_IN_PTS;
}
-static void process_byte(struct iso7816_3_handle *ih, u_int8_t byte)
+static void process_byte(struct iso7816_3_handle *ih, uint8_t byte)
{
int new_state = -1;
struct req_ctx *rctx;
@@ -589,7 +589,7 @@ void iso_uart_flush(void)
void iso_uart_idleflush(void)
{
static struct req_ctx *last_req = NULL;
- static u_int16_t last_len = 0;
+ static uint16_t last_len = 0;
if (last_req == isoh.rctx &&
last_len == isoh.rctx->tot_len &&
@@ -603,8 +603,8 @@ void iso_uart_idleflush(void)
static __ramfunc void usart_irq(void)
{
- u_int32_t csr = usart->US_CSR;
- u_int8_t octet;
+ uint32_t csr = usart->US_CSR;
+ uint8_t octet;
//DEBUGP("USART IRQ, CSR=0x%08x\n", csr);
@@ -620,7 +620,7 @@ static __ramfunc void usart_irq(void)
}
if (csr & (AT91C_US_PARE|AT91C_US_FRAME|AT91C_US_OVRE)) {
- u_int8_t nb_err = usart->US_NER;
+ uint8_t nb_err = usart->US_NER;
/* FIXME: some error has occurrerd */
//DEBUGP("NER=%02x ", nb_err);
/* clear the status */
@@ -641,7 +641,7 @@ static __ramfunc void usart_irq(void)
}
/* handler for the RST input pin state change */
-static void reset_pin_irq(u_int32_t pio)
+static void reset_pin_irq(uint32_t pio)
{
if (!AT91F_PIO_IsInputSet(AT91C_BASE_PIOA, pio)) {
/* make sure to flush pending req_ctx */
@@ -659,7 +659,7 @@ static void reset_pin_irq(u_int32_t pio)
void iso_uart_dump(void)
{
- u_int32_t csr = usart->US_CSR;
+ uint32_t csr = usart->US_CSR;
DEBUGPCR("USART CSR=0x%08x", csr);
}
diff --git a/firmware/src/simtrace/main_factory.c b/firmware/src/simtrace/main_factory.c
index 7a491ed..502feb2 100644
--- a/firmware/src/simtrace/main_factory.c
+++ b/firmware/src/simtrace/main_factory.c
@@ -72,7 +72,7 @@ int _main_dbgu(char key)
break;
case 'P':
{
- u_int32_t version;
+ uint32_t version;
int rc = prod_info_get(&version, NULL);
if (rc >= 0)
DEBUGPCR("Version: 0x%08x\n", version);
diff --git a/firmware/src/simtrace/prod_info.c b/firmware/src/simtrace/prod_info.c
index 87ef6e2..ef2e8eb 100644
--- a/firmware/src/simtrace/prod_info.c
+++ b/firmware/src/simtrace/prod_info.c
@@ -38,17 +38,17 @@
struct simtrace_prod_info
{
/* magic value */
- u_int32_t magic;
+ uint32_t magic;
/* unix timestamp of production date (0=unknown) */
- u_int32_t production_ts;
+ uint32_t production_ts;
/* hardware version */
- u_int32_t version;
+ uint32_t version;
/* re-works applied */
- u_int32_t reworks;
+ uint32_t reworks;
} __attribute__((packed));
-int prod_info_write(u_int32_t ts, u_int32_t version, u_int32_t reworks)
+int prod_info_write(uint32_t ts, uint32_t version, uint32_t reworks)
{
struct simtrace_prod_info pi = {
.magic = PRODINFO_MAGIC,
@@ -56,8 +56,8 @@ int prod_info_write(u_int32_t ts, u_int32_t version, u_int32_t reworks)
.version = version,
.reworks = reworks,
};
- u_int8_t *pi8 = (u_int8_t *) π
- u_int32_t addr = OTP_ADDR(OTP_REGION_PRODINFO);
+ uint8_t *pi8 = (uint8_t *) π
+ uint32_t addr = OTP_ADDR(OTP_REGION_PRODINFO);
unsigned int rc;
int i;
@@ -80,12 +80,12 @@ int prod_info_write(u_int32_t ts, u_int32_t version, u_int32_t reworks)
return rc;
}
-int prod_info_get(u_int32_t *ver, u_int32_t *reworks)
+int prod_info_get(uint32_t *ver, uint32_t *reworks)
{
struct simtrace_prod_info pi;
- u_int32_t addr = OTP_ADDR(OTP_REGION_PRODINFO);
+ uint32_t addr = OTP_ADDR(OTP_REGION_PRODINFO);
- spiflash_otp_read(addr, (u_int8_t *) &pi, sizeof(pi));
+ spiflash_otp_read(addr, (uint8_t *) &pi, sizeof(pi));
if (pi.magic != PRODINFO_MAGIC)
return -1;
diff --git a/firmware/src/simtrace/prod_info.h b/firmware/src/simtrace/prod_info.h
index 7a12421..796ee7a 100644
--- a/firmware/src/simtrace/prod_info.h
+++ b/firmware/src/simtrace/prod_info.h
@@ -6,7 +6,7 @@
((c & 0xff) << 0))
-int prod_info_write(u_int32_t ts, u_int32_t version, u_int32_t reworks);
-int prod_info_get(u_int32_t *ver, u_int32_t *reworks);
+int prod_info_write(uint32_t ts, uint32_t version, uint32_t reworks);
+int prod_info_get(uint32_t *ver, uint32_t *reworks);
#endif
diff --git a/firmware/src/simtrace/sim_switch.c b/firmware/src/simtrace/sim_switch.c
index 90067ac..36f9f0c 100644
--- a/firmware/src/simtrace/sim_switch.c
+++ b/firmware/src/simtrace/sim_switch.c
@@ -48,7 +48,7 @@ void sim_switch_mode(int connect_io, int connect_misc)
AT91F_PIO_SetOutput(AT91C_BASE_PIOA, SIMTRACE_PIO_SC_SW);
}
-static void sw_sim_irq(u_int32_t pio)
+static void sw_sim_irq(uint32_t pio)
{
if (!AT91F_PIO_IsInputSet(AT91C_BASE_PIOA, SIMTRACE_PIO_SW_SIM))
@@ -57,7 +57,7 @@ static void sw_sim_irq(u_int32_t pio)
DEBUGPCR("SIM card removed");
}
-static void vcc_phone_irq(u_int32_t pio)
+static void vcc_phone_irq(uint32_t pio)
{
if (!AT91F_PIO_IsInputSet(AT91C_BASE_PIOA, SIMTRACE_PIO_VCC_PHONE)) {
DEBUGPCR("VCC_PHONE off");
diff --git a/firmware/src/simtrace/spi_flash.c b/firmware/src/simtrace/spi_flash.c
index ffda1b2..10c6fa7 100644
--- a/firmware/src/simtrace/spi_flash.c
+++ b/firmware/src/simtrace/spi_flash.c
@@ -88,15 +88,15 @@ void spiflash_write_protect(int on)
static __ramfunc void spi_irq(void)
{
- u_int32_t status = pSPI->SPI_SR;
+ uint32_t status = pSPI->SPI_SR;
AT91F_AIC_ClearIt(AT91C_BASE_AIC, AT91C_ID_SPI);
}
-static const u_int8_t chipid_s25fl032p[3] = { 0x01, 0x02, 0x15 };
+static const uint8_t chipid_s25fl032p[3] = { 0x01, 0x02, 0x15 };
-static u_int8_t chip_id[3];
-static u_int32_t otp_supported;
+static uint8_t chip_id[3];
+static uint32_t otp_supported;
void spiflash_init(void)
{
@@ -141,13 +141,13 @@ void spiflash_init(void)
otp_supported = 1;
}
-static int spi_transceive(const u_int8_t *tx_data, u_int16_t tx_len,
- u_int8_t *rx_data, u_int16_t *rx_len, u_int16_t rx_skip)
+static int spi_transceive(const uint8_t *tx_data, uint16_t tx_len,
+ uint8_t *rx_data, uint16_t *rx_len, uint16_t rx_skip)
{
- u_int16_t tx_cur = 0;
- u_int16_t rx_len_max = 0;
- u_int16_t rx_cnt = 0;
- u_int8_t tmp;
+ uint16_t tx_cur = 0;
+ uint16_t rx_len_max = 0;
+ uint16_t rx_cnt = 0;
+ uint8_t tmp;
DEBUGPSPI("spi_transceive: enter(tx_len=%u) ", tx_len);
@@ -161,7 +161,7 @@ static int spi_transceive(const u_int8_t *tx_data, u_int16_t tx_len,
//AT91F_SPI_Enable(pSPI);
while (1) {
- u_int32_t sr = pSPI->SPI_SR;
+ uint32_t sr = pSPI->SPI_SR;
if (sr & AT91C_SPI_RDRF) {
tmp = pSPI->SPI_RDR;
rx_cnt++;
@@ -199,11 +199,11 @@ static int spi_transceive(const u_int8_t *tx_data, u_int16_t tx_len,
return 0;
}
-void spiflash_get_id(u_int8_t *id)
+void spiflash_get_id(uint8_t *id)
{
- const u_int8_t tx_data[] = { SPIF_CMD_RDID, 0, 0, 0 };
- u_int8_t rx_data[] = { 0,0,0,0 };
- u_int16_t rx_len = sizeof(rx_data);
+ const uint8_t tx_data[] = { SPIF_CMD_RDID, 0, 0, 0 };
+ uint8_t rx_data[] = { 0,0,0,0 };
+ uint16_t rx_len = sizeof(rx_data);
spi_transceive(tx_data, sizeof(tx_data), rx_data, &rx_len, 1);
DEBUGPSPI("SPI ID: %02x %02x %02x\r\n",
@@ -213,9 +213,9 @@ void spiflash_get_id(u_int8_t *id)
int spiflash_read_status(void)
{
- const u_int8_t tx_data[] = { SPIF_CMD_RDSR, 0 };
- u_int8_t rx_data[1];
- u_int16_t rx_len = sizeof(rx_data);
+ const uint8_t tx_data[] = { SPIF_CMD_RDSR, 0 };
+ uint8_t rx_data[1];
+ uint16_t rx_len = sizeof(rx_data);
spi_transceive(tx_data, sizeof(tx_data), rx_data, &rx_len, 1);
@@ -226,14 +226,14 @@ int spiflash_read_status(void)
void spiflash_clear_status(void)
{
- const u_int8_t tx_data[] = { SPIF_CMD_CLSR };
+ const uint8_t tx_data[] = { SPIF_CMD_CLSR };
spi_transceive(tx_data, sizeof(tx_data), NULL, 0, 0);
}
int spiflash_write_enable(int enable)
{
- u_int8_t tx_data[1];
+ uint8_t tx_data[1];
if (enable)
tx_data[0] = SPIF_CMD_WREN;
@@ -245,9 +245,9 @@ int spiflash_write_enable(int enable)
return 0;
}
-int spiflash_otp_read(u_int32_t otp_addr, u_int8_t *out, u_int16_t rx_len)
+int spiflash_otp_read(uint32_t otp_addr, uint8_t *out, uint16_t rx_len)
{
- u_int8_t tx_data[] = { SPIF_CMD_OTPR, 0, 0, 0, 0 };
+ uint8_t tx_data[] = { SPIF_CMD_OTPR, 0, 0, 0, 0 };
if (!otp_supported) {
DEBUGP("OTP not supported!\r\n");
@@ -269,9 +269,9 @@ int spiflash_otp_read(u_int32_t otp_addr, u_int8_t *out, u_int16_t rx_len)
return rx_len;
}
-int spiflash_otp_write(u_int32_t otp_addr, u_int8_t data)
+int spiflash_otp_write(uint32_t otp_addr, uint8_t data)
{
- u_int8_t tx_data[] = { SPIF_CMD_OTPP, 0, 0, 0, 0 };
+ uint8_t tx_data[] = { SPIF_CMD_OTPP, 0, 0, 0, 0 };
if (!otp_supported) {
DEBUGP("OTP not supported!\r\n");
@@ -293,7 +293,7 @@ int spiflash_otp_write(u_int32_t otp_addr, u_int8_t data)
return 0;
}
-static int otp_region2addr(u_int8_t region)
+static int otp_region2addr(uint8_t region)
{
/* see Figure 10.1 of S25FL032P data sheet */
if (region > 31 || region < 1)
@@ -308,7 +308,7 @@ static int otp_region2addr(u_int8_t region)
return 0x112;
}
-static int otp_region2bit(u_int8_t region)
+static int otp_region2bit(uint8_t region)
{
/* see Figure 10.1 of S25FL032P data sheet */
if (region > 31 || region < 1)
@@ -323,10 +323,10 @@ static int otp_region2bit(u_int8_t region)
return region - 1;
}
-int spiflash_otp_get_lock(u_int8_t region)
+int spiflash_otp_get_lock(uint8_t region)
{
- u_int32_t addr;
- u_int8_t bit, data;
+ uint32_t addr;
+ uint8_t bit, data;
if (region > 31 || region < 1)
return -1;
@@ -342,10 +342,10 @@ int spiflash_otp_get_lock(u_int8_t region)
return 0;
}
-int spiflash_otp_set_lock(u_int8_t region)
+int spiflash_otp_set_lock(uint8_t region)
{
- u_int32_t addr;
- u_int8_t bit;
+ uint32_t addr;
+ uint8_t bit;
if (region > 31 || region < 1)
return -1;
diff --git a/firmware/src/simtrace/spi_flash.h b/firmware/src/simtrace/spi_flash.h
index d823130..1654eec 100644
--- a/firmware/src/simtrace/spi_flash.h
+++ b/firmware/src/simtrace/spi_flash.h
@@ -6,14 +6,14 @@
#define OTP_ADDR(x) (0x114 + ( ((x) - 1) * 16 ) )
void spiflash_init(void);
-void spiflash_get_id(u_int8_t *id);
+void spiflash_get_id(uint8_t *id);
int spiflash_read_status(void);
void spiflash_clear_status(void);
void spiflash_write_protect(int on);
int spiflash_write_enable(int enable);
-int spiflash_otp_read(u_int32_t otp_addr, u_int8_t *out, u_int16_t rx_len);
-int spiflash_otp_write(u_int32_t otp_addr, u_int8_t data);
-int spiflash_otp_get_lock(u_int8_t region);
-int spiflash_otp_set_lock(u_int8_t region);
+int spiflash_otp_read(uint32_t otp_addr, uint8_t *out, uint16_t rx_len);
+int spiflash_otp_write(uint32_t otp_addr, uint8_t data);
+int spiflash_otp_get_lock(uint8_t region);
+int spiflash_otp_set_lock(uint8_t region);
#endif
diff --git a/firmware/src/simtrace/tc_etu.c b/firmware/src/simtrace/tc_etu.c
index fc52033..88be665 100644
--- a/firmware/src/simtrace/tc_etu.c
+++ b/firmware/src/simtrace/tc_etu.c
@@ -26,14 +26,14 @@
static AT91PS_TCB tcb;
static AT91PS_TC tcetu = AT91C_BASE_TC0;
-static u_int16_t waiting_time = 9600;
-static u_int16_t clocks_per_etu = 372;
-static u_int16_t wait_events;
+static uint16_t waiting_time = 9600;
+static uint16_t clocks_per_etu = 372;
+static uint16_t wait_events;
static __ramfunc void tc_etu_irq(void)
{
- u_int32_t sr = tcetu->TC_SR;
- static u_int16_t nr_events;
+ uint32_t sr = tcetu->TC_SR;
+ static uint16_t nr_events;
if (sr & AT91C_TC_ETRGS) {
/* external trigger, i.e. we have seen a bit on I/O */
@@ -73,14 +73,14 @@ static void recalc_nr_events(void)
tcetu->TC_RC = clocks_per_etu * 12;
}
-void tc_etu_set_wtime(u_int16_t wtime)
+void tc_etu_set_wtime(uint16_t wtime)
{
waiting_time = wtime;
recalc_nr_events();
//DEBUGPCR("wtime=%u, actually waiting %u", wtime, wait_events * 12);
}
-void tc_etu_set_etu(u_int16_t etu)
+void tc_etu_set_etu(uint16_t etu)
{
clocks_per_etu = etu;
recalc_nr_events();
diff --git a/firmware/src/simtrace/tc_etu.h b/firmware/src/simtrace/tc_etu.h
index 59d9031..ee1458d 100644
--- a/firmware/src/simtrace/tc_etu.h
+++ b/firmware/src/simtrace/tc_etu.h
@@ -1,4 +1,4 @@
-void tc_etu_set_wtime(u_int16_t wtime);
-void tc_etu_set_etu(u_int16_t etu);
+void tc_etu_set_wtime(uint16_t wtime);
+void tc_etu_set_etu(uint16_t etu);
void tc_etu_init(void);
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