| Commit message (Collapse) | Author | Age | Files | Lines |
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We have to send a ZLP at the end of such transfers, otherwise the host
will time out at the end of the transfer. This resulted in multi-second
delays for recognizing the SIMtrace hardware by the USB host.
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Thus, we need to invert our check during the dfu / main dual boot
decision
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git-svn-id: https://svn.openpcd.org:2342/trunk@478 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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speed (needs testing), but takes up 4k of RAM
git-svn-id: https://svn.openpcd.org:2342/trunk@477 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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four static buffers took about 18k, the new dynamic allocations take about 2k)
git-svn-id: https://svn.openpcd.org:2342/trunk@476 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@475 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Add code to get/set uid/nonce
git-svn-id: https://svn.openpcd.org:2342/trunk@474 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@473 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@472 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@471 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@470 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@469 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@468 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Print UID, nonce and response
git-svn-id: https://svn.openpcd.org:2342/trunk@467 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@466 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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make the SSC TXSYN IRQ arrive late, which will make the SSC not switch to CONTINUOUS in time which will truncate all
frames longer than 3.5 data bytes
git-svn-id: https://svn.openpcd.org:2342/trunk@465 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@464 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@463 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@462 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@461 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@460 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@459 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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even slower)
git-svn-id: https://svn.openpcd.org:2342/trunk@458 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Only perform the switch to continous when necessary since it has serious side effects in the current hardware (we really need TF ored into the clock gating)
git-svn-id: https://svn.openpcd.org:2342/trunk@457 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@456 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@455 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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in anticol mode performing one cycle every 70ms) there were 52 late frames in 15992.
git-svn-id: https://svn.openpcd.org:2342/trunk@454 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@453 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Integrate T/C receiver into iso14443 layer 2a
Add state field to iso14443_frame, rename ssc buffer state constants
Sniffer seems to work with the new code
git-svn-id: https://svn.openpcd.org:2342/trunk@452 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@451 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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precious RAM
git-svn-id: https://svn.openpcd.org:2342/trunk@450 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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that should be real-time capable
git-svn-id: https://svn.openpcd.org:2342/trunk@449 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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MCK/2 cycles for the short frame
git-svn-id: https://svn.openpcd.org:2342/trunk@448 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Measure miller decoder performance
git-svn-id: https://svn.openpcd.org:2342/trunk@447 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@446 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Add Tx abort and SSC reset functionalities
There is a bug workaround for a peculiarity in the SSC Tx: When it is set to START CONTINOUS while a transmission is in progress (started by START TF RISING EDGE, which is necessary for the correct
timing) it will lose one (or two?) bits of sample data. The resetting of the start condition itself is necessary because the SSC will only transmit up to 64 bytes (32 bit times 16) per start
condition
Add performance counters for sent and received frames
git-svn-id: https://svn.openpcd.org:2342/trunk@445 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@444 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Move clock switch to its own header file
Specify default (and for non-clock switching capable hardware: single) clock source in hardware definitions
git-svn-id: https://svn.openpcd.org:2342/trunk@443 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@442 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@441 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@440 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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