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* Copy over the relevant changes from the sniffonly branch pending integrationhenryk2008-03-051-0/+1
| | | | git-svn-id: https://svn.openpcd.org:2342/trunk@442 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Implement transmissionhenryk2008-03-031-2/+3
| | | | | | | | Implement a 'pretender' for PoC: Since Rx is not working properly we'll just pretend to have received something based on the approximate length. Clarify length calculations in machester encoder and remove obsolete test code git-svn-id: https://svn.openpcd.org:2342/trunk@437 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* New cleaned-up (and then messed up again) SSC codehenryk2008-02-291-2/+2
| | | | | | | Better layering separation git-svn-id: https://svn.openpcd.org:2342/trunk@434 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Framework to support run-time hardware selection. Future hardware releases ↵henryk2008-02-111-0/+1
| | | | | | | | | should be changed to be boot-time detectable (e.g. using the yet unused AD inputs) so that one image can be used for all releases git-svn-id: https://svn.openpcd.org:2342/trunk@411 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Commit a first version of an iso 14443 layer 2 and a passive sniffer. Works ↵henryk2008-02-091-0/+2
| | | | | | for short frames, and sometimes even for long frames. Pending some major cleanup git-svn-id: https://svn.openpcd.org:2342/trunk@408 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Add new miller decoder (not working yet)henryk2007-12-121-0/+1
| | | | | | | Vastly improve timing through CPU cycle counting. Jitter is now like 40ns (the SSC_DATA edge detection fuzziness) in 2 main clusters 4 CPU cycles (83ns) apart, plus an occasional glitch adding 4 CPU cycles in either direction git-svn-id: https://svn.openpcd.org:2342/trunk@385 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Added automatic dependency generation to makefilehenryk2007-11-261-2/+11
| | | | git-svn-id: https://svn.openpcd.org:2342/trunk@354 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Add load modulation and encoding/decoding code from haraldhenryk2007-11-241-0/+5
| | | | git-svn-id: https://svn.openpcd.org:2342/trunk@351 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Commit status quo: Start adding iso 14443 layer 3a codehenryk2007-11-211-0/+1
| | | | | | | Currently working on fiq for pio data change to reset tc0 via swtrg git-svn-id: https://svn.openpcd.org:2342/trunk@336 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Add ssc rx start and reboot commandshenryk2007-11-191-1/+2
| | | | | | | Print version and compile date on help and config commands git-svn-id: https://svn.openpcd.org:2342/trunk@332 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Add script to generate compile.hhenryk2007-11-191-2/+5
| | | | git-svn-id: https://svn.openpcd.org:2342/trunk@331 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Add (ring-)buffered print functions to enable debug output from IRQ handlers ↵henryk2007-11-181-0/+1
| | | | | | or similar situations git-svn-id: https://svn.openpcd.org:2342/trunk@330 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Get tc_cdiv working (presumably, need to check on the oscilloscope)henryk2007-11-131-0/+2
| | | | | | | Add adc code to read the field strength git-svn-id: https://svn.openpcd.org:2342/trunk@325 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Add code modules for tc_fdt, tc_cdiv_sync, tc_cdiv, ssc_picchenryk2007-11-111-0/+3
| | | | | | | | Almost all of these have not been checked yet, I just copied them over and hot-fixed compile time errors F.e. all ssc usb code has been removed git-svn-id: https://svn.openpcd.org:2342/trunk@323 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Add pio_irq and pll codehenryk2007-11-111-0/+2
| | | | | | | (and a dummy dbgu.h) git-svn-id: https://svn.openpcd.org:2342/trunk@322 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* DA code to set the comparator thresholdhenryk2007-11-071-0/+1
| | | | git-svn-id: https://svn.openpcd.org:2342/trunk@312 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Initial import of FreeRTOS code for OpenPICChenryk2007-11-061-0/+119
git-svn-id: https://svn.openpcd.org:2342/trunk@311 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
personal git repositories of Harald Welte. Your mileage may vary