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* Further optimizations, is now down to 1450 MCK/2 cycles for a 7 bit frame, ↵henryk2008-03-101-39/+29
| | | | | | that should be real-time capable git-svn-id: https://svn.openpcd.org:2342/trunk@449 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Further optimisation on the differential miller decoder, is now down to 1750 ↵henryk2008-03-101-135/+132
| | | | | | MCK/2 cycles for the short frame git-svn-id: https://svn.openpcd.org:2342/trunk@448 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Add performance measurement codehenryk2008-03-101-6/+13
| | | | | | | Measure miller decoder performance git-svn-id: https://svn.openpcd.org:2342/trunk@447 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
* Port over the differential miller decoder from the sniffonly host toolhenryk2008-03-051-0/+346
Move clock switch to its own header file Specify default (and for non-clock switching capable hardware: single) clock source in hardware definitions git-svn-id: https://svn.openpcd.org:2342/trunk@443 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
personal git repositories of Harald Welte. Your mileage may vary