| Commit message (Collapse) | Author | Age | Files | Lines |
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Make load modulation level changeable on the fly
Better fdt calculation and ajustable fdt offset
git-svn-id: https://svn.openpcd.org:2342/trunk@378 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Switch SSC IRQ handling from edge triggered to level triggered. Somehow I was losing the ENDTX interrupt otherwise
Modified ISO14443 code for testing to enable repeated REQA->ATQA cycles. Somehow only the first ATQA is correct, subsequent ATQAs are missing the first two bits. Need to debug
git-svn-id: https://svn.openpcd.org:2342/trunk@373 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@372 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@359 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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specific stuff out of ssc_picc
Add ssc tx code (doesn't work yet)
git-svn-id: https://svn.openpcd.org:2342/trunk@355 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Restructure/add some buffer code
Reset the watchdog timer (now at 1.5s), add a watchdog pinger thread
git-svn-id: https://svn.openpcd.org:2342/trunk@352 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Currently working on fiq for pio data change to reset tc0 via swtrg
git-svn-id: https://svn.openpcd.org:2342/trunk@336 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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continuous mode (with new short and incomplete ssc irq handler: FIXME, either switch back to original handler (maybe fixing it
if necessary) or handle the missing cases in the new handler). Lots of debug statements still in there
git-svn-id: https://svn.openpcd.org:2342/trunk@335 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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git-svn-id: https://svn.openpcd.org:2342/trunk@333 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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Almost all of these have not been checked yet, I just copied them over and hot-fixed compile time errors
F.e. all ssc usb code has been removed
git-svn-id: https://svn.openpcd.org:2342/trunk@323 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
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