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* Framework to support run-time hardware selection. Future hardware releases sh...henryk2008-02-118-57/+83
* Add command to toggle PLL inhibitionhenryk2008-02-113-1/+13
* Remove old OpenBeacon remnantshenryk2008-02-091-28/+0
* Commit a first version of an iso 14443 layer 2 and a passive sniffer. Works f...henryk2008-02-097-46/+387
* Factor out time print code and enhance ithenryk2008-02-032-12/+29
* Change order on these two because otherwise unloading while IRQs are still en...henryk2008-02-031-1/+1
* Commit status quo. Partly or severely broken.henryk2008-02-025-14/+35
* Use finer grained #ifdef's for the new board's featureshenryk2007-12-213-5/+11
* Add SSC_DATA_GATE supporthenryk2007-12-203-0/+33
* New hardware versionhenryk2007-12-193-8/+37
* Play with transfer sizeshenryk2007-12-193-10/+68
* Optimizing (disabling debugging reduces time spent in decoder from 460us to 60ushenryk2007-12-171-20/+43
* That comment is not true anymorehenryk2007-12-161-6/+1
* Get SSC_MODE_14443A workinghenryk2007-12-163-9/+28
* Record size of SSC RX DMA buffers in transfers, much clearerhenryk2007-12-157-20/+89
* Standard state is still idlehenryk2007-12-151-2/+2
* Further the distinction between SSC and PDC transfersizehenryk2007-12-155-18/+24
* Prepare generic ISO 14443A reception mode (no short/standard distinction), pr...henryk2007-12-154-25/+51
* Fix consistency checkhenryk2007-12-153-19/+21
* Sanitize and clarify the len handling in rx buffers.henryk2007-12-145-28/+44
* Add complicated mechanism that should have brought clock cycle accurate measu...henryk2007-12-121-0/+1
* Add new miller decoder (not working yet)henryk2007-12-127-34/+156
* Some more delayhenryk2007-12-111-3/+5
* Several modifications to enable spinning until the correct phase is reached i...henryk2007-12-115-18/+53
* Clean up SSC performance metric reportinghenryk2007-12-094-21/+47
* Prevent late frames by spinning in SSC CP0 IRQ till end of short frame receptionhenryk2007-12-094-8/+34
* Make it possible to send long frames for debugginghenryk2007-12-094-36/+82
* Change parity storage in frame structhenryk2007-12-092-3/+4
* Count and print late frameshenryk2007-12-094-3/+57
* inlined miller bit decode functionmeri2007-12-061-1/+1
* Fix stupid buffer leakage code in standard modehenryk2007-12-062-3/+5
* Obsolete commenthenryk2007-12-051-2/+0
* Add a kludge to make repetitive sends working. For some obscure reason the fi...henryk2007-12-052-0/+6
* Revamp SSC buffer handling, should severely reduce buffer leakagehenryk2007-12-055-154/+175
* remove old debugging #ifdef'shenryk2007-12-053-26/+10
* Change tc_cdiv_set_divider. The new code seems to work nearly perfect (jitter...henryk2007-12-041-2/+5
* ATQA needs to be transmitted with parityhenryk2007-12-031-1/+1
* * Reduce leaking of TX buffershenryk2007-12-033-3/+19
* Fix copy and paste error in prefill_bufferhenryk2007-12-031-1/+8
* Fix power-on logic for the case that the card is already in the fieldhenryk2007-11-301-26/+25
* Fix SSC TX registers (especially the clock source selection), peripheral conf...henryk2007-11-292-7/+40
* Move to prefilling the transmit buffer for faster ATQA responsehenryk2007-11-292-33/+53
* Switch to hardcoded fiq handler implementation directly in the vector table (...henryk2007-11-291-26/+5
* Forgotten filehenryk2007-11-271-0/+5
* Print relevant SSC registershenryk2007-11-273-2/+18
* Restructure irq handling for setting tc_fdt (works now) and to get most iso s...henryk2007-11-264-72/+140
* Remove unusedhenryk2007-11-261-67/+0
* Prepare transmission codehenryk2007-11-268-111/+264
* Add load modulation and encoding/decoding code from haraldhenryk2007-11-249-3/+558
* hex and dec ...henryk2007-11-231-1/+1
personal git repositories of Harald Welte. Your mileage may vary