Commit message (Expand) | Author | Age | Files | Lines | |
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* | Several modifications to enable spinning until the correct phase is reached i... | henryk | 2007-12-11 | 1 | -10/+33 |
* | Prevent late frames by spinning in SSC CP0 IRQ till end of short frame reception | henryk | 2007-12-09 | 1 | -1/+9 |
* | Fix FIQ code for SSC TF emulation | henryk | 2007-12-03 | 1 | -8/+7 |
* | Fix SSC TX registers (especially the clock source selection), peripheral conf... | henryk | 2007-11-29 | 1 | -0/+24 |
* | Switch to hardcoded fiq handler implementation directly in the vector table (... | henryk | 2007-11-29 | 1 | -79/+14 |
* | Add a work around to have each pio data change fiq followed by a regular IRQ ... | henryk | 2007-11-23 | 1 | -10/+15 |
* | Commit status quo (pending cleanup of the debug and experimental code that I ... | henryk | 2007-11-23 | 1 | -15/+63 |
* | Add tragically failed (and commented out) attempt to remap ram to addr 0 | henryk | 2007-11-21 | 1 | -0/+16 |
* | Commit status quo: Start adding iso 14443 layer 3a code | henryk | 2007-11-21 | 1 | -2/+91 |
* | Initial import of FreeRTOS code for OpenPICC | henryk | 2007-11-06 | 1 | -0/+161 |