| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@444 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
| |
Move clock switch to its own header file
Specify default (and for non-clock switching capable hardware: single) clock source in hardware definitions
git-svn-id: https://svn.openpcd.org:2342/trunk@443 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@442 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@441 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@440 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@439 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
| |
Once in a while (about 1 in 20) there's an error condition that's not being recovered from, need to investigate
git-svn-id: https://svn.openpcd.org:2342/trunk@438 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
| |
Implement a 'pretender' for PoC: Since Rx is not working properly we'll just pretend to have received something based on the approximate length.
Clarify length calculations in machester encoder and remove obsolete test code
git-svn-id: https://svn.openpcd.org:2342/trunk@437 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@436 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@435 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
| |
Better layering separation
git-svn-id: https://svn.openpcd.org:2342/trunk@434 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@433 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
|
|
| |
efficiently sent.
Should affect existing byte base code only marginally.
(Note: Not compliant with FreeRTOS' braindead coding style)
git-svn-id: https://svn.openpcd.org:2342/trunk@416 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
|
| |
should be changed to be boot-time detectable (e.g. using the yet unused AD inputs) so that one image can be used for all
releases
git-svn-id: https://svn.openpcd.org:2342/trunk@411 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@410 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@409 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
| |
for short frames, and sometimes even for long frames. Pending some major cleanup
git-svn-id: https://svn.openpcd.org:2342/trunk@408 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@404 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
| |
enabled will lead to an IRQ storm
git-svn-id: https://svn.openpcd.org:2342/trunk@403 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@402 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@400 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@399 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@398 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
| |
Enhance timing by removing debugging code
Pending rewrite of SSC RX IRQ code
git-svn-id: https://svn.openpcd.org:2342/trunk@397 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@396 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@395 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@394 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
| |
Change miller decoder to take an RX DMA buffer in order to have access to the reception_mode member, much more versatile
git-svn-id: https://svn.openpcd.org:2342/trunk@393 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@392 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
| |
Add convenient access to the last data bit from the miller decoder for type a frames
git-svn-id: https://svn.openpcd.org:2342/trunk@391 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
| |
prerequisite for proper frame handling and anticol, doesn't work yet
git-svn-id: https://svn.openpcd.org:2342/trunk@390 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@389 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
| |
Fix miller decoder for the case of a buffer containing only zeroes
git-svn-id: https://svn.openpcd.org:2342/trunk@388 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
| |
Fix miller decoder
git-svn-id: https://svn.openpcd.org:2342/trunk@387 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
| |
measurement. Doesn't seem to work properly
git-svn-id: https://svn.openpcd.org:2342/trunk@386 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
| |
Vastly improve timing through CPU cycle counting. Jitter is now like 40ns (the SSC_DATA edge detection fuzziness) in 2 main clusters 4 CPU cycles (83ns) apart, plus an occasional glitch adding 4 CPU cycles in either direction
git-svn-id: https://svn.openpcd.org:2342/trunk@385 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@384 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
|
| |
in tc_fdt (thereby taking the phase information from tc_fdt, resetting the phase in tc_cdiv)
Still too much jitter (some bug in this code?)
git-svn-id: https://svn.openpcd.org:2342/trunk@383 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@382 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
| |
Fix tc_cdiv_set_divider. again.
Reverse the polarity! (of the ssc transmit clock)
git-svn-id: https://svn.openpcd.org:2342/trunk@381 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@380 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@379 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
| |
Make load modulation level changeable on the fly
Better fdt calculation and ajustable fdt offset
git-svn-id: https://svn.openpcd.org:2342/trunk@378 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@377 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@376 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@375 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
|
| |
first transfer of subsequent transmissions (32 sample-bits, equalling 2 data-bits) gets lost. It does work if I just give
the same TX buffer to the PDC twice (once after starting the TX PDC).
git-svn-id: https://svn.openpcd.org:2342/trunk@374 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
|
|
| |
Switch SSC IRQ handling from edge triggered to level triggered. Somehow I was losing the ENDTX interrupt otherwise
Modified ISO14443 code for testing to enable repeated REQA->ATQA cycles. Somehow only the first ATQA is correct, subsequent ATQAs are missing the first two bits. Need to debug
git-svn-id: https://svn.openpcd.org:2342/trunk@373 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
| |
git-svn-id: https://svn.openpcd.org:2342/trunk@372 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|
|
|
|
|
|
| |
(jitter is now near 1 sample for the fdt of 1172)
git-svn-id: https://svn.openpcd.org:2342/trunk@371 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
|