From bc7d72bf05d8e84c207f9be30abab23b3023408f Mon Sep 17 00:00:00 2001
From: "(no author)" <(no author)@6dc7ffe9-61d6-0310-9af1-9938baff3ed1>
Date: Tue, 8 Aug 2006 20:10:20 +0000
Subject: major rework of carrier division signals: 1) RFID_RESET moved PA29 ->
 PA5 2) MFIN (PWM0 output) moved PA0 -> PA23 3) PA0 recondfigured as TIOA0
 output (CDIV_HELP) 4) PA29 reconfigured as TCLK2 input 5) TIOA0 (PA0)
 interconnected with TCLK2 (PA29) 6) PA1 reconfigured as TIOB0 output
 (CARRIER_DIV) 7) TIOB0 (PA1) interconnected with SSC_RK (PA19)

git-svn-id: https://svn.openpcd.org:2342/trunk@87 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
---
 openpcd/firmware/src/openpcd.h | 17 ++++++++++-------
 openpcd/firmware/src/pwm.c     |  5 +++--
 openpcd/firmware/src/tc.c      | 25 +++++++++++++++++--------
 3 files changed, 30 insertions(+), 17 deletions(-)

diff --git a/openpcd/firmware/src/openpcd.h b/openpcd/firmware/src/openpcd.h
index ce9aac8..db5b845 100644
--- a/openpcd/firmware/src/openpcd.h
+++ b/openpcd/firmware/src/openpcd.h
@@ -14,13 +14,16 @@
 
 #define OPENPCD_IRQ_RC632	AT91C_ID_IRQ1
 
-#define OPENPCD_PIO_CARRIER_DIV	AT91C_PIO_PA1
-#define OPENPCD_PIO_MFIN	AT91C_PIO_PA17
-#define OPENPCD_PIO_MFOUT	AT91C_PIO_PA18
-#define OPENPCD_PIO_SSP_CKIN	AT91C_PIO_PA19
-#define OPENPCD_PIO_RC632_RESET	AT91C_PIO_PA29
-#define OPENPCD_PIO_TRIGGER	AT91C_PIO_PA31
-#define OPENPCD_PIO_CARRIER	AT91C_PIO_PA28
+#define OPENPCD_PIO_CDIV_HELP_OUT	AT91C_PA0_TIOA0
+#define OPENPCD_PIO_CDIV_HELP_IN	AT91C_PA29_TCLK2
+#define OPENPCD_PIO_MFIN_PWM		AT91C_PA23_PWM0
+#define OPENPCD_PIO_CARRIER_DIV_OUT	AT91C_PA1_TIOB0
+#define OPENPCD_PIO_MFIN_SSC_TX		AT91C_PA17_TD
+#define OPENPCD_PIO_MFOUT_SSC_RX	AT91C_PA18_RD
+#define OPENPCD_PIO_SSP_CKIN		AT91C_PA19_RK
+#define OPENPCD_PIO_RC632_RESET		AT91C_PIO_PA5
+#define OPENPCD_PIO_TRIGGER		AT91C_PIO_PA31
+#define OPENPCD_PIO_CARRIER_IN		AT91C_PA28_TCLK1
 
 #define OPENPCD_IRQ_PRIO_SPI	AT91C_AIC_PRIOR_HIGHEST
 #define OPENPCD_IRQ_PRIO_SSC	(AT91C_AIC_PRIOR_HIGHEST-1)
diff --git a/openpcd/firmware/src/pwm.c b/openpcd/firmware/src/pwm.c
index 9d79b61..1b19355 100644
--- a/openpcd/firmware/src/pwm.c
+++ b/openpcd/firmware/src/pwm.c
@@ -9,6 +9,7 @@
 #include <sys/types.h>
 #include <errno.h>
 #include "dbgu.h"
+#include "openpcd.h"
 
 #define Hz
 #define	kHz	*1000 Hz
@@ -104,8 +105,8 @@ void pwm_init(void)
 	/* IMPORTANT: Disable PA17 (SSC TD) output */
 	AT91F_PIO_CfgInput(AT91C_BASE_PIOA, AT91C_PIO_PA17);
 
-	/* Set PA0 to Peripheral A (PWM0) */
-	AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, AT91C_PA0_PWM0, 0);
+	/* Set PA23 to Peripheral A (PWM0) */
+	AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, OPENPCD_PIO_MFIN_PWM);
 
 	/* Enable Clock for PWM controller */
 	AT91F_PWMC_CfgPMC();
diff --git a/openpcd/firmware/src/tc.c b/openpcd/firmware/src/tc.c
index 4ee28ba..5318644 100644
--- a/openpcd/firmware/src/tc.c
+++ b/openpcd/firmware/src/tc.c
@@ -31,9 +31,12 @@ void tc_cdiv_phase_add(int16_t inc)
 
 void tc_cdiv_init(void)
 {
-	/* Cfg PIO28 as Periph B */
-	AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, OPENPCD_PIO_CARRIER|
-			    OPENPCD_PIO_CARRIER_DIV);
+	/* Cfg PA28(TCLK1), PA0(TIOA0), PA1(TIOB0), PA20(TCLK2) as Periph B */
+	AT91F_PIO_CfgPeriph(AT91C_BASE_PIOA, 0, 
+			    OPENPCD_PIO_CARRIER_IN |
+			    OPENPCD_PIO_CARRIER_DIV_OUT |
+			    OPENPCD_PIO_CDIV_HELP_OUT |
+			    OPENPCD_PIO_CDIV_HELP_IN);
 
 	AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, 
 				    ((unsigned int) 1 << AT91C_ID_TC0));
@@ -41,13 +44,19 @@ void tc_cdiv_init(void)
 	/* Enable Clock for TC0 */
 	tcb->TCB_TC0.TC_CCR = AT91C_TC_CLKEN;
 
-	/* Connect TCLK1 to XC1 */
-	tcb->TCB_BMR &= ~AT91C_TCB_TC1XC1S;
-	tcb->TCB_BMR |=  AT91C_TCB_TC1XC1S_TCLK1;
+	/* Connect TCLK1 to XC1, TCLK2 to XC2 */
+	tcb->TCB_BMR &= ~(AT91C_TCB_TC1XC1S | AT91C_TCB_TC2XC2S);
+	tcb->TCB_BMR |=  (AT91C_TCB_TC1XC1S_TCLK1 | AT91C_TCB_TC2XC2S_TCLK2);
 
+	/* Clock XC1, Wave mode, Reset on RC comp
+	 * TIOA0 on RA comp = set, * TIOA0 on RC comp = clear,
+	 * TIOB0 on EEVT = set, TIOB0 on RB comp = clear,
+	 * EEVT = XC2 (TIOA0) */
 	tcb->TCB_TC0.TC_CMR = AT91C_TC_CLKS_XC1 | AT91C_TC_WAVE |
-			      AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPC_SET |
-			      AT91C_TC_BCPC_CLEAR | AT91C_TC_EEVT_XC0;
+			      AT91C_TC_WAVESEL_UP_AUTO | 
+			      AT91C_TC_ACPA_SET | AT91C_TC_ACPC_CLEAR |
+			      AT91C_TC_BEEVT_SET | AT91C_TC_BCPB_CLEAR |
+			      AT91C_TC_EEVT_XC2 | AT91C_TC_ETRGEDG_RISING;
 
 	tc_cdiv_set_divider(128);
 
-- 
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