From fbc2ed57dd562c8ca2458becaeb17e78516adaa5 Mon Sep 17 00:00:00 2001
From: "(no author)" <(no author)@6dc7ffe9-61d6-0310-9af1-9938baff3ed1>
Date: Sun, 10 Sep 2006 14:15:41 +0000
Subject: use SPI controllers internal timeout

git-svn-id: https://svn.openpcd.org:2342/trunk@171 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
---
 openpcd/firmware/src/openpcd.h   |  6 +++---
 openpcd/firmware/src/picc/poti.c | 23 ++++++++++++++++++-----
 2 files changed, 21 insertions(+), 8 deletions(-)

(limited to 'openpcd')

diff --git a/openpcd/firmware/src/openpcd.h b/openpcd/firmware/src/openpcd.h
index ab8dadf..0fdf9a1 100644
--- a/openpcd/firmware/src/openpcd.h
+++ b/openpcd/firmware/src/openpcd.h
@@ -104,13 +104,13 @@
  * PA14	SPCK	A	O	SPI Clock
  * PA15	PA15	P	I	PLL_LOCK
  * PA16	PA16	P	O	UDP_PUP (old)
- * PA17	TD	A	O	SSC Tx Data (MOD)
+ * PA17	TD	A	O	SSC Tx Data (MOD) *
  * PA18	RD	A	I	SSC Rx Data (SSC_DATA)
  * PA19	RK	A	I	SSC Rx Clock (SSC_CLOCK)
  * PA20	PA20	P	I	AB_DETECT
  * PA21	PA21	P	I	N/C
  * PA22	PA22	P	I	N/C 
- * PA23	PWM0	B	O	PWM Output * (MOD)
+ * PA23	PWM0	B	O	PWM Output (MOD) *
  * PA24	PA24	P	O	PLL_INHIBIT
  * PA25	PA25	P	O	LED1 green
  * PA26	PA26	P	O	LED2 red
@@ -124,7 +124,7 @@
 
 #define OPENPICC_PIO_LOAD1		AT91C_PIO_PA2
 #define OPENPICC_PIO_LOAD2		AT91C_PIO_PA3
-#define OPENPICC_PIO_SLAVE_RESET	AT91C_PIO_PA5
+#define OPENPICC_PIO_nSLAVE_RESET	AT91C_PIO_PA5
 #define OPENPICC_PIO_BOOTLDR		AT91C_PIO_PA6
 #define OPENPICC_PIO_SS2_DT_THRESH	AT91C_PIO_PA8
 #define OPENPICC_PIO_SS1_GAIN		AT91C_PIO_PA11
diff --git a/openpcd/firmware/src/picc/poti.c b/openpcd/firmware/src/picc/poti.c
index 55691ba..0bd08b9 100644
--- a/openpcd/firmware/src/picc/poti.c
+++ b/openpcd/firmware/src/picc/poti.c
@@ -14,14 +14,22 @@ void poti_comp_carr(u_int8_t position)
 
 	while (!(spi->SPI_SR & AT91C_SPI_TDRE)) { }
 	AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SS2_DT_THRESH);
-	for (i = 0; i < 0xff; i++) { }
+	//for (i = 0; i < 0xff; i++) { }
 	/* shift one left, since it is a seven-bit value written as 8 bit xfer */
-	spi->SPI_TDR = position;
+	spi->SPI_TDR = position & 0x7f;
 	while (!(spi->SPI_SR & AT91C_SPI_TDRE)) { }
 	for (i = 0; i < 0xff; i++) { }
 	AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SS2_DT_THRESH);
 }
 
+void poti_reset(void)
+{
+	volatile int i;
+	AT91F_PIO_ClearOutput(AT91C_BASE_PIOA, OPENPICC_PIO_nSLAVE_RESET);
+	for (i = 0; i < 0xff; i++) { }
+	AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPICC_PIO_nSLAVE_RESET);
+}
+
 void poti_init(void)
 {
 	AT91F_SPI_CfgPMC();
@@ -30,6 +38,10 @@ void poti_init(void)
 
 	AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SS2_DT_THRESH);
 	AT91F_PIO_SetOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SS2_DT_THRESH);
+
+	AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, OPENPICC_PIO_nSLAVE_RESET);
+	poti_reset();
+
 #if 0
 	AT91F_AIC_ConfigureIt(AT91C_BASE_AIC, AT91C_ID_SPI,
 			      OPENPCD_IRQ_PRIO_SPI,
@@ -38,8 +50,9 @@ void poti_init(void)
 #endif
 	AT91F_SPI_CfgMode(spi, AT91C_SPI_MSTR | 
 			  AT91C_SPI_PS_FIXED | AT91C_SPI_MODFDIS);
-	/* CPOL = 0, NCPHA = 1, CSAAT = 0, BITS = 0000, SCBR = 12 (4MHz),
-	 * DLYBS = 0, DLYBCT = 0 */
-	AT91F_SPI_CfgCs(spi, 0, AT91C_SPI_BITS_8 | AT91C_SPI_NCPHA | (24<<8));
+	/* CPOL = 0, NCPHA = 1, CSAAT = 0, BITS = 0000, SCBR = 13 (3.69MHz),
+	 * DLYBS = 6 (125nS), DLYBCT = 0 */
+	AT91F_SPI_CfgCs(spi, 0, AT91C_SPI_BITS_8 | AT91C_SPI_NCPHA |
+			(13 << 8) | (6 << 16));
 	AT91F_SPI_Enable(spi);
 }
-- 
cgit v1.2.3