From 625ffcb32a947cbcf66b491f1f0ddd49d31c0a5e Mon Sep 17 00:00:00 2001 From: henryk Date: Sat, 15 Mar 2008 04:29:10 +0000 Subject: Fix the clock gating for the new layer 2 code Only perform the switch to continous when necessary since it has serious side effects in the current hardware (we really need TF ored into the clock gating) git-svn-id: https://svn.openpcd.org:2342/trunk@457 6dc7ffe9-61d6-0310-9af1-9938baff3ed1 --- openpicc/application/iso14443_layer2a.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'openpicc/application/iso14443_layer2a.c') diff --git a/openpicc/application/iso14443_layer2a.c b/openpicc/application/iso14443_layer2a.c index 2288eaa..2c2de3a 100644 --- a/openpicc/application/iso14443_layer2a.c +++ b/openpicc/application/iso14443_layer2a.c @@ -263,6 +263,9 @@ int iso14443_layer2a_init(u_int8_t enable_fast_receive) tc_cdiv_init(); tc_fdt_init(); + tc_cdiv_sync_init(); + tc_cdiv_sync_enable(); + clock_switch_init(); load_mod_init(); -- cgit v1.2.3