From 616746c2e01a0425a9fc62d24153d88079f0daac Mon Sep 17 00:00:00 2001
From: henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1>
Date: Wed, 21 Nov 2007 04:45:15 +0000
Subject: Commit status quo: Start adding iso 14443 layer 3a code Currently
 working on fiq for pio data change to reset tc0 via swtrg

git-svn-id: https://svn.openpcd.org:2342/trunk@336 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
---
 openpicc/application/tc_cdiv_sync.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'openpicc/application/tc_cdiv_sync.c')

diff --git a/openpicc/application/tc_cdiv_sync.c b/openpicc/application/tc_cdiv_sync.c
index 422fe44..0486f90 100644
--- a/openpicc/application/tc_cdiv_sync.c
+++ b/openpicc/application/tc_cdiv_sync.c
@@ -19,9 +19,11 @@ static void pio_data_change(u_int32_t pio)
 	 * change the level is high, then it must have been a rising
 	 * edge */
 	if (*AT91C_PIOA_PDSR & OPENPICC_PIO_FRAME) {
+		vLedSetGreen(1);
 		*AT91C_TC0_CCR = AT91C_TC_SWTRG;
 		DEBUGPCR("CDIV_SYNC_FLIP SWTRG CV=0x%08x",
 			  *AT91C_TC0_CV);
+		vLedSetGreen(0);
 	} else
 		DEBUGPCR("");
 	//vLedSetGreen(0);
@@ -60,7 +62,6 @@ void tc_cdiv_sync_enable(void)
 	*AT91C_PIOA_IER = OPENPICC_PIO_FRAME;
 }
 
-extern void (*fiq_handler)(void);
 void tc_cdiv_sync_init(void)
 {
 	pio_irq_init_once();
@@ -69,7 +70,6 @@ void tc_cdiv_sync_init(void)
 	enabled = 0;
 
 	AT91F_PIOA_CfgPMC();
-	
 	AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, OPENPICC_PIO_SSC_DATA_CONTROL);
 	
 	pio_irq_register(OPENPICC_PIO_FRAME, &pio_data_change);
-- 
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