From f00879830b776cbc3fbeddfb4c97473d99cba904 Mon Sep 17 00:00:00 2001 From: henryk Date: Tue, 4 Dec 2007 19:40:33 +0000 Subject: Change tc_cdiv_set_divider. The new code seems to work nearly perfect (jitter is now near 1 sample for the fdt of 1172) git-svn-id: https://svn.openpcd.org:2342/trunk@371 6dc7ffe9-61d6-0310-9af1-9938baff3ed1 --- openpicc/application/tc_cdiv.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'openpicc') diff --git a/openpicc/application/tc_cdiv.c b/openpicc/application/tc_cdiv.c index 3bbfe77..d389214 100644 --- a/openpicc/application/tc_cdiv.c +++ b/openpicc/application/tc_cdiv.c @@ -39,8 +39,11 @@ void tc_cdiv_set_divider(u_int16_t div) tcb->TCB_TC0.TC_RA = 1; tcb->TCB_TC0.TC_RB = 1 + (div >> 1); - /* Save current CV as phase, then reset to 0 (might otherwise be greater than RC) */ - tc_cdiv_phase_add(tcb->TCB_TC0.TC_RC-(tcb->TCB_TC0.TC_CV%tcb->TCB_TC0.TC_RC)); + /* We must reset CV to zero when it was greater than RC. + * In order to not lose phase information when doing that we'll busy wait till CV is + * zero modulo the new RC.*/ + /*tc_cdiv_phase_add(tcb->TCB_TC0.TC_RC-(tcb->TCB_TC0.TC_CV%tcb->TCB_TC0.TC_RC));*/ + if(tcb->TCB_TC0.TC_CV > div) while(tcb->TCB_TC0.TC_CV % div != 0); tcb->TCB_TC0.TC_CCR = AT91C_TC_SWTRG; } -- cgit v1.2.3