diff options
| author | Harald Welte <laforge@gnumonks.org> | 2011-07-04 20:52:54 +0200 |
|---|---|---|
| committer | Harald Welte <laforge@gnumonks.org> | 2011-07-04 20:52:54 +0200 |
| commit | 044ad7c3987460ede48ff27afd6bdb0ca05a0432 (patch) | |
| tree | 924818cdb0d39ca08aec540d18da7bd406eaae8c /usb/host | |
import at91lib from at91lib_20100901_softpack_1_9_v_1_0_svn_v1501120100901_softpack_1_9_v_1_0_svn_v15011
it's sad to see that atmel doesn't publish their svn repo or has
a centralized location or even puts proper version/release info
into the library itself
Diffstat (limited to 'usb/host')
| -rw-r--r-- | usb/host/core/USBH.h | 73 | ||||
| -rw-r--r-- | usb/host/core/USB_UHP.c | 223 | ||||
| -rw-r--r-- | usb/host/ohci/ohci.c | 124 | ||||
| -rw-r--r-- | usb/host/ohci/ohci.h | 139 |
4 files changed, 559 insertions, 0 deletions
diff --git a/usb/host/core/USBH.h b/usb/host/core/USBH.h new file mode 100644 index 0000000..7836619 --- /dev/null +++ b/usb/host/core/USBH.h @@ -0,0 +1,73 @@ +/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !!!Purpose
+///
+/// Collection of methods for using the USB device controller on AT91
+/// microcontrollers.
+///
+/// !!!Usage
+///
+/// Please refer to the corresponding application note.
+/// - "AT91 USB device framework"
+/// - "USBD API" . "USBD API Methods"
+//------------------------------------------------------------------------------
+
+#ifndef USBH_H
+#define USBH_H
+
+//------------------------------------------------------------------------------
+// Headers
+//------------------------------------------------------------------------------
+
+#include <memories/Media.h>
+//#include <usb/common/core/USBEndpointDescriptor.h>
+//#include <usb/common/core/USBGenericRequest.h>
+#include <usb/host/ohci/ohci.h>
+//------------------------------------------------------------------------------
+// Definitions
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Exported functions
+//------------------------------------------------------------------------------
+
+extern void USBH_Init(OHCI_HCCA* pHCCA);
+extern void USBH_ResetPort(unsigned char portNumber);
+extern unsigned char USBH_IsDeviceConnectedOnPort(unsigned char portNumber);
+extern void USBH_program(unsigned int* pBHED, unsigned int* pBCED, OHCI_HCCA* pHCCA);
+extern void USBH_enablingPort(void);
+
+
+#endif //#ifndef USBD_H
+
diff --git a/usb/host/core/USB_UHP.c b/usb/host/core/USB_UHP.c new file mode 100644 index 0000000..59c3b4c --- /dev/null +++ b/usb/host/core/USB_UHP.c @@ -0,0 +1,223 @@ +/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+// Headers
+//------------------------------------------------------------------------------
+
+#include <board.h>
+#include <pio/pio.h>
+#include <utility/trace.h>
+#include <stdio.h>
+#include "USBH.h"
+#include <usb/host/ohci/ohci.h>
+
+
+//------------------------------------------------------------------------------
+// Definitions
+//------------------------------------------------------------------------------
+
+/// HcFmInterval Register:
+/// FrameInterval specifies the interval between 2 consecutive SOFs in bit times
+/// 1/12 = 0,08333333
+/// 1(ms) / 0,0833333 = 12
+/// FrameInterval = 12x1000 = 12000
+#define FRAMEINTERVAL 12000
+/// FSLargestDataPacket
+/// This field specifies a value which is loaded into the Largest
+/// Data Packet Counter at the beginning of each frame.
+
+/// overhead.
+/// The value of MAXIMUM_OVERHEAD below is 210 bit times.
+#define MAXIMUM_OVERHEAD 210
+/// FSLargestDataPacket initializes a counter within the Host Controller that is
+/// used to determine if a transaction on USB can be completed before EOF
+/// processing must start.
+/// It is a function of the new FrameInterval and is calculated by subtracting
+/// from FrameInterval the maximum number of bit times for transaction overhead
+/// on USB and the number of bit times needed for EOF processing, then
+/// multiplying the result by 6/7 to account for the worst case bit stuffing
+#define FSLARGESTDATAPACKET (((FRAMEINTERVAL-MAXIMUM_OVERHEAD) * 6) / 7)
+#define OHCI_FMINTERVAL ((FSLARGESTDATAPACKET << 16) | FRAMEINTERVAL)
+
+/// HcPeriodicStart Register
+// The HcPeriodicStart register has a 14-bit programmable value which
+// determines when is the earliest time HC should start processing the
+// periodic list.
+/// Set HcPeriodicStart to a value that is 90% of the value in FrameInterval
+/// field of the HcFmInterval register.
+#define OHCI_PRDSTRT (FRAMEINTERVAL*90/100)
+
+
+//------------------------------------------------------------------------------
+// Internal Functions
+//------------------------------------------------------------------------------
+
+#ifdef AT91C_BASE_UHPHS_OHCI
+#define AT91C_ID_UHP AT91C_ID_UHPHS
+#define AT91C_BASE_UHP AT91C_BASE_UHPHS_OHCI
+#define UHP_HcRhPortStatus UHPHS_OHCI_HcRhPortStatus
+#define UHP_HcControlHeadED UHPHS_OHCI_HcControlHeadED
+#define UHP_HcControlCurrentED UHPHS_OHCI_HcControlCurrentED
+#define UHP_HcBulkDoneHead UHPHS_OHCI_HcBulkDoneHead
+#define UHP_HcControl UHPHS_OHCI_HcControl
+#define UHP_HcRhStatus UHPHS_OHCI_HcRhStatus
+#define UHP_HcHCCA UHPHS_OHCI_HcHCCA
+#define UHP_HcFmInterval UHPHS_OHCI_HcFmInterval
+#define UHP_HcPeriodicStart UHPHS_OHCI_HcPeriodicStart
+#endif
+
+//------------------------------------------------------------------------------
+/// Enable UHP clock
+//------------------------------------------------------------------------------
+static inline void UHP_EnablePeripheralClock(void)
+{
+ AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UHP);
+}
+
+//------------------------------------------------------------------------------
+/// Disable UHP clock
+//------------------------------------------------------------------------------
+static inline void UHP_DisablePeripheralClock( void )
+{
+ AT91C_BASE_PMC->PMC_PCDR = (1 << AT91C_ID_UHP);
+}
+
+//------------------------------------------------------------------------------
+/// Enables the 48MHz USB clock.
+//------------------------------------------------------------------------------
+static inline void UHP_EnableUsbClock(void)
+{
+#ifdef AT91C_PMC_USBS_USB_UPLL
+ AT91C_BASE_PMC->PMC_USB = AT91C_PMC_USBS_USB_UPLL | AT91C_PMC_USBDIV_10;
+#endif
+#ifdef AT91C_CKGR_UPLLEN_ENABLED
+ AT91C_BASE_PMC->PMC_UCKR = AT91C_CKGR_UPLLEN_ENABLED;
+#endif
+ AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UHP;
+}
+
+//------------------------------------------------------------------------------
+/// Disables the 48MHz USB clock.
+//------------------------------------------------------------------------------
+static inline void UHP_DisableUsbClock(void)
+{
+ AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_UHP;
+#ifdef AT91C_CKGR_UPLLEN_ENABLED
+ AT91C_BASE_PMC->PMC_UCKR = AT91C_CKGR_UPLLEN_ENABLED;
+#endif
+}
+
+//------------------------------------------------------------------------------
+// Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Detect a connected device
+//------------------------------------------------------------------------------
+unsigned char USBH_IsDeviceConnectedOnPort(unsigned char portNumber)
+{
+ return (AT91C_BASE_UHP->UHP_HcRhPortStatus[portNumber] & 0x01);
+}
+
+//------------------------------------------------------------------------------
+/// Reset the port number
+//------------------------------------------------------------------------------
+void USBH_ResetPort(unsigned char portNumber)
+{
+ // SetPortReset
+ AT91C_BASE_UHP->UHP_HcRhPortStatus[portNumber] = (1 << 4);
+ // Wait for the end of reset
+ while (AT91C_BASE_UHP->UHP_HcRhPortStatus[portNumber] & (1 << 4));
+ // SetPortEnable
+ AT91C_BASE_UHP->UHP_HcRhPortStatus[portNumber] = (1 << 1);
+}
+
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+void USBH_program(unsigned int* pBHED, unsigned int* pBCED, OHCI_HCCA* pHCCA)
+{
+ // Programming the BHED
+ // The HcBulkHeadED register contains the physical address of the first
+ // Endpoint Descriptor of the Bulk list.
+ AT91C_BASE_UHP->UHP_HcControlHeadED = (unsigned int) pBHED;
+
+ // Programming the BCED
+ // The HcBulkCurrentED register contains the physical address of the current
+ // endpoint of the Bulk list.
+ AT91C_BASE_UHP->UHP_HcControlCurrentED = (unsigned int) pBCED;
+
+ // Initializing the UHP_HcDoneHead
+ AT91C_BASE_UHP->UHP_HcBulkDoneHead = 0x00;
+ pHCCA->UHP_HccaDoneHead = 0x0000;
+
+ // Forcing UHP_Hc to Operational State
+ AT91C_BASE_UHP->UHP_HcControl = 0x80;
+}
+
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+void USBH_enablingPort(void)
+{
+ // Enabling port power
+ AT91C_BASE_UHP->UHP_HcRhPortStatus[0] = 0x00000100;
+ AT91C_BASE_UHP->UHP_HcRhPortStatus[1] = 0x00000100;
+ AT91C_BASE_UHP->UHP_HcRhStatus = 0x00010000;
+}
+
+//------------------------------------------------------------------------------
+/// Initializes the specified USB driver
+/// This function initializes the current FIFO bank of endpoints,
+/// configures the pull-up and VBus lines, disconnects the pull-up and
+/// then trigger the Init callback.
+//------------------------------------------------------------------------------
+void USBH_Init(OHCI_HCCA* pHCCA)
+{
+ TRACE_DEBUG_WP("USBH Init()\n\r");
+
+ UHP_EnablePeripheralClock();
+ UHP_EnableUsbClock();
+
+ // Forcing UHP_Hc to reset
+ AT91C_BASE_UHP->UHP_HcControl = 0;
+
+ // Writing the UHP_HCCA
+ AT91C_BASE_UHP->UHP_HcHCCA = (unsigned int) &pHCCA;
+
+ // Enabling list processing
+ AT91C_BASE_UHP->UHP_HcControl = 0;
+
+ // HcFmInterval register is used to control the length of USB frames
+ AT91C_BASE_UHP->UHP_HcFmInterval = OHCI_FMINTERVAL;
+ // The HcPeriodicStart register has a 14-bit programmable value which
+ // determines when is the earliest time HC should start processing the
+ // periodic list.
+ AT91C_BASE_UHP->UHP_HcPeriodicStart = OHCI_PRDSTRT;
+}
+
diff --git a/usb/host/ohci/ohci.c b/usb/host/ohci/ohci.c new file mode 100644 index 0000000..d125559 --- /dev/null +++ b/usb/host/ohci/ohci.c @@ -0,0 +1,124 @@ +/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/// OHCI ED, TD HCCA definitions + inlined functions
+
+
+#include "ohci.h"
+
+
+//------------------------------------------------------------------------------
+/// Init a pre-allocated endpoint descriptor
+/// TD must be aligned on a 16 bytes boundary
+//------------------------------------------------------------------------------
+void OHCI_CreateEd( unsigned int EDAddr,
+ unsigned int MaxPacket,
+ unsigned int TDFormat,
+ unsigned int Skip,
+ unsigned int Speed,
+ unsigned int Direction,
+ unsigned int EndPt,
+ unsigned int FuncAddress,
+ unsigned int TDQTailPntr,
+ unsigned int TDQHeadPntr,
+ unsigned int ToggleCarry,
+ unsigned int NextED )
+{
+ OHCIEndpointDescriptor *pED = (OHCIEndpointDescriptor*) EDAddr;
+
+ pED->Control = (MaxPacket << 16) | (TDFormat << 15) |
+ (Skip << 14) | (Speed << 13) | (Direction << 11) |
+ (EndPt << 7) | FuncAddress;
+ pED->TailP = (TDQTailPntr & 0xFFFFFFF0);
+ pED->HeadP = (TDQHeadPntr & 0xFFFFFFF0) | (ToggleCarry << 1);
+ pED->NextEd = (NextED & 0xFFFFFFF0);
+}
+
+//------------------------------------------------------------------------------
+/// Init a pre-allocated transfer descriptor
+/// TD must be aligned on a 16 bytes boundary
+//------------------------------------------------------------------------------
+void OHCI_CreateGenTd( unsigned int GenTdAddr,
+ unsigned int DataToggle,
+ unsigned int DelayInterrupt,
+ unsigned int Direction,
+ unsigned int BufRnding,
+ unsigned int CurBufPtr,
+ unsigned int NextTD,
+ unsigned int BuffLen)
+{
+ OHCITransferDescriptor *pTD = (OHCITransferDescriptor*) GenTdAddr;
+
+ pTD->Control = (DataToggle << 24) | (DelayInterrupt << 21)
+ | (Direction << 19) | (BufRnding << 18);
+ pTD->CBP = CurBufPtr;
+ pTD->NextTD = (NextTD & 0xFFFFFFF0);
+ pTD->BE = (BuffLen) ? (CurBufPtr + BuffLen - 1) : CurBufPtr;
+}
+
+//------------------------------------------------------------------------------
+/// Init a pre-allocated periodic transfer descriptor
+/// TD must be aligned on a 16 bytes boundary
+//------------------------------------------------------------------------------
+void OHCI_CreateGenITd( unsigned int GenTdAddr,
+ unsigned int CondCode,
+ unsigned int FrameCount,
+ unsigned int DelayInterrupt,
+ unsigned int StartFrame,
+ unsigned int BuffPage0,
+ unsigned int NextTD,
+ unsigned int BufEnd,
+ unsigned int PswOffset0,
+ unsigned int PswOffset1,
+ unsigned int PswOffset2,
+ unsigned int PswOffset3,
+ unsigned int PswOffset4,
+ unsigned int PswOffset5,
+ unsigned int PswOffset6,
+ unsigned int PswOffset7)
+{
+ OHCIPeriodicTransferDescriptor *pITD = (OHCIPeriodicTransferDescriptor*) GenTdAddr;
+
+ pITD->Control = (CondCode << 28) | (FrameCount << 24)
+ | (DelayInterrupt << 21) | StartFrame;
+ pITD->BP0 = (BuffPage0 << 12);
+ pITD->NextTD = (NextTD << 4);
+ pITD->BE = BufEnd;
+ pITD->PSW0 = PswOffset0;
+ pITD->PSW1 = PswOffset1;
+ pITD->PSW2 = PswOffset2;
+ pITD->PSW3 = PswOffset3;
+ pITD->PSW4 = PswOffset4;
+ pITD->PSW5 = PswOffset5;
+ pITD->PSW6 = PswOffset6;
+ pITD->PSW7 = PswOffset7;
+
+}
+
+
diff --git a/usb/host/ohci/ohci.h b/usb/host/ohci/ohci.h new file mode 100644 index 0000000..804d75b --- /dev/null +++ b/usb/host/ohci/ohci.h @@ -0,0 +1,139 @@ +/* ----------------------------------------------------------------------------
+ * ATMEL Microcontroller Software Support
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaimer below.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/// OHCI ED, TD HCCA definitions + inlined functions
+
+#ifndef _OHCI_H
+#define _OHCI_H
+
+#ifdef __ICCARM__ // IAR
+#pragma pack(8)
+#define __attribute__(...) // IAR
+#endif // IAR
+// Endpoint Descriptor Field Definitions
+typedef struct {
+ // FunctionAddress | EndpointNumber | Direction | Speed | sKip | Format
+ // MaximumPacketSize
+ volatile unsigned int Control;
+ // TailP: TDQueueTailPointer
+ // If TailP and HeadP are the same, then the list contains no TD that the HC
+ // can process. If TailP and HeadP are different, then the list contains a TD to be
+ // processed.
+ volatile unsigned int TailP;
+ // HeadP: TDQueueHeadPointer Points to the next TD to be processed for this
+ // endpoint.
+ volatile unsigned int HeadP;
+ // NextED: If nonzero, then this entry points to the next ED on the list
+ volatile unsigned int NextEd;
+} __attribute__((aligned(16))) OHCIEndpointDescriptor;
+
+/// General Transfer Descriptor Format
+typedef struct {
+ volatile unsigned int Control; // bufferRounding | Direction/PID | DelayInterrupt
+ // DataToggle | ErrorCount | ConditionCode
+ volatile unsigned int CBP; // Current Buffer Pointer
+ volatile unsigned int NextTD; // Next TD
+ volatile unsigned int BE; // Buffer End
+} __attribute__((aligned(16))) OHCITransferDescriptor;
+
+typedef struct {
+ volatile unsigned int Control; // StartingFrame | DelayInterrupt | FrameCount
+ // ConditionCode
+ volatile unsigned int BP0; // Buffer Page 0
+ volatile unsigned int NextTD; // NextTD
+ volatile unsigned int BE; // Buffer End
+ volatile unsigned int PSW0; // Offset0/PSW0
+ volatile unsigned int PSW1; // Offset1/PSW1
+ volatile unsigned int PSW2; // Offset2/PSW2
+ volatile unsigned int PSW3; // Offset3/PSW3
+ volatile unsigned int PSW4; // Offset4/PSW4
+ volatile unsigned int PSW5; // Offset5/PSW5
+ volatile unsigned int PSW6; // Offset6/PSW6
+ volatile unsigned int PSW7; // Offset7/PSW7
+} __attribute__((aligned(8))) OHCIPeriodicTransferDescriptor;
+
+//Host Controller Communications Area Description
+typedef struct {
+ // pointers to an Interrupt List each of which is a list of EDs
+ volatile unsigned int UHP_HccaInterruptTable[32];
+ // This 16-bit value is updated by the Host Controller on each frame.
+ volatile unsigned short UHP_HccaFrameNumber; // current frame number
+ // When the HC updates HccaFrameNumber, it sets this word to 0.
+ volatile unsigned short UHP_HccaPad1;
+ // When a TD is complete (with or without an error) it is unlinked from the
+ // queue that it is on and linked to the Done Queue
+ volatile unsigned int UHP_HccaDoneHead;
+ // Reserved for use by HC
+ volatile unsigned char reserved[116];
+} __attribute__((aligned(8))) OHCI_HCCA;
+
+#ifdef __ICCARM__ // IAR
+#pragma pack() // IAR
+#endif // IAR
+
+
+extern void OHCI_CreateEd( unsigned int EDAddr,
+ unsigned int MaxPacket,
+ unsigned int TDFormat,
+ unsigned int Skip,
+ unsigned int Speed,
+ unsigned int Direction,
+ unsigned int EndPt,
+ unsigned int FuncAddress,
+ unsigned int TDQTailPntr,
+ unsigned int TDQHeadPntr,
+ unsigned int ToggleCarry,
+ unsigned int NextED );
+extern void OHCI_CreateGenTd( unsigned int GenTdAddr,
+ unsigned int DataToggle,
+ unsigned int DelayInterrupt,
+ unsigned int Direction,
+ unsigned int BufRnding,
+ unsigned int CurBufPtr,
+ unsigned int NextTD,
+ unsigned int BuffLen);
+extern void OHCI_CreateGenITd( unsigned int GenTdAddr,
+ unsigned int CondCode,
+ unsigned int FrameCount,
+ unsigned int DelayInterrupt,
+ unsigned int StartFrame,
+ unsigned int BuffPage0,
+ unsigned int NextTD,
+ unsigned int BufEnd,
+ unsigned int PswOffset0,
+ unsigned int PswOffset1,
+ unsigned int PswOffset2,
+ unsigned int PswOffset3,
+ unsigned int PswOffset4,
+ unsigned int PswOffset5,
+ unsigned int PswOffset6,
+ unsigned int PswOffset7);
+#endif //_OHCI_H
+
+
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