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| author | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2008-03-15 04:29:10 +0000 |
|---|---|---|
| committer | henryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2008-03-15 04:29:10 +0000 |
| commit | 625ffcb32a947cbcf66b491f1f0ddd49d31c0a5e (patch) | |
| tree | 50df40dd8fd1100b9d5b0cc42063c74d5f84ab62 /openpicc/application/pll.c | |
| parent | 8ad8a1ea8800ea4cc6a2c74b24ce8bf867d8a906 (diff) | |
Fix the clock gating for the new layer 2 code
Only perform the switch to continous when necessary since it has serious side effects in the current hardware (we really need TF ored into the clock gating)
git-svn-id: https://svn.openpcd.org:2342/trunk@457 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
Diffstat (limited to 'openpicc/application/pll.c')
0 files changed, 0 insertions, 0 deletions