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authorhenryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1>2007-11-23 17:32:14 +0000
committerhenryk <henryk@6dc7ffe9-61d6-0310-9af1-9938baff3ed1>2007-11-23 17:32:14 +0000
commitaa804cf4ef8ed3236ae0065952d1faef735b3824 (patch)
treeae0b5069cf266016f7aa4fa307845a0828156df7 /openpicc/application/ssc_picc.c
parent062f55ca3ea77ebcace83aab4772c9cd3f28ec34 (diff)
Add a work around to have each pio data change fiq followed by a regular IRQ in order to enable some code to be run synchronized with critical sections
git-svn-id: https://svn.openpcd.org:2342/trunk@348 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
Diffstat (limited to 'openpicc/application/ssc_picc.c')
-rw-r--r--openpicc/application/ssc_picc.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/openpicc/application/ssc_picc.c b/openpicc/application/ssc_picc.c
index acdf9ae..e9fdbfb 100644
--- a/openpicc/application/ssc_picc.c
+++ b/openpicc/application/ssc_picc.c
@@ -102,9 +102,6 @@ static const u_int16_t ssc_dmasize[] = {
AT91C_SSC_TXBUFE | \
AT91C_SSC_TXSYN)
-/* This stores the value that SSC_RCMR should be set to when a frame start is detected.
- * Will be used in my_fiq_handler in os/boot/boot.s */
-u_int32_t ssc_rcmr_on_start = 0;
void ssc_rx_mode_set(enum ssc_mode ssc_mode)
{
u_int8_t data_len=0, num_data=0, sync_len=0;
personal git repositories of Harald Welte. Your mileage may vary