Commit status quo. Partly or severely broken.

git-svn-id: https://svn.openpcd.org:2342/trunk@402 6dc7ffe9-61d6-0310-9af1-9938baff3ed1

5 files changed, 35 insertions, 14 deletions

diff --git a/openpicc/application/iso14443_layer3a.c b/openpicc/application/iso14443_layer3a.c
index c1f7bce..fdb6836 100644
--- a/openpicc/application/iso14443_layer3a.c
+++ b/openpicc/application/iso14443_layer3a.c
@@ -1,6 +1,7 @@
 /***************************************************************
  *
  * OpenPICC - ISO 14443 Layer 3 Type A state machine
+ * Handles initialization and anticollision
  *
  * Copyright 2007 Henryk Plötz <henryk@ploetzli.ch>
  *
@@ -77,7 +78,7 @@ const u_int8_t ISO14443A_SHORT_FRAME_WUPA[ISO14443A_SHORT_FRAME_COMPARE_LENGTH]
 #define INITIAL_FRAME NULL_FRAME
 #endif
 
-#if 1
+#if 0
 #define SHORT_MODE SSC_MODE_14443A_SHORT
 #define STANDARD_MODE SSC_MODE_14443A_STANDARD
 #else
@@ -101,10 +102,14 @@ void iso14443_transmit(ssc_dma_tx_buffer_t *buf, int fdt, int div)
 	} else if (fdt == ISO14443A_TRANSMIT_AT_NEXT_INTERVAL_1) {
 		fdt = tc_fdt_get_next_slot(ISO14443A_FDT_SHORT_1, ISO14443A_FDT_SLOTLEN);
 	}
-	ssc_tx_fiq_fdt_cdiv = fdt -3*div -1;
-	tc_fdt_set(ssc_tx_fiq_fdt_cdiv -MAX_TF_FIQ_ENTRY_DELAY -MAX_TF_FIQ_OVERHEAD);
-	ssc_tx_fiq_fdt_ssc  = fdt -div +1;
-	*AT91C_TC0_CCR = AT91C_TC_CLKDIS;
+	if(0) {
+		ssc_tx_fiq_fdt_cdiv = fdt -3*div -1;
+		tc_fdt_set(ssc_tx_fiq_fdt_cdiv -MAX_TF_FIQ_ENTRY_DELAY -MAX_TF_FIQ_OVERHEAD);
+		ssc_tx_fiq_fdt_ssc  = fdt -div +1;
+		*AT91C_TC0_CCR = AT91C_TC_CLKDIS;
+	} else {
+		tc_fdt_set(fdt);
+	}
 	ssc_tx_start(buf);
 }
 
diff --git a/openpicc/application/iso14443_layer3a.h b/openpicc/application/iso14443_layer3a.h
index 42a37bc..1eb94b4 100644
--- a/openpicc/application/iso14443_layer3a.h
+++ b/openpicc/application/iso14443_layer3a.h
@@ -87,7 +87,8 @@ extern const u_int8_t ISO14443A_SHORT_FRAME_WUPA[ISO14443A_SHORT_FRAME_COMPARE_L
 #define ISO14443A_MAX_RX_FRAME_SIZE_IN_BITS (256*9 +2)
 /******************** TX ************************************/
 /* Magic delay, don't know where it comes from */
-#define MAGIC_OFFSET -32
+//#define MAGIC_OFFSET -32
+#define MAGIC_OFFSET -10
 /* Delay from modulation till detection in SSC_DATA */
 #define DETECTION_DELAY 11
 /* See fdt_timinig.dia for these values */
diff --git a/openpicc/application/iso14443a_manchester.c b/openpicc/application/iso14443a_manchester.c
index 4093d57..303491f 100644
--- a/openpicc/application/iso14443a_manchester.c
+++ b/openpicc/application/iso14443a_manchester.c
@@ -106,12 +106,18 @@ int manchester_encode(u_int8_t *sample_buf, u_int16_t sample_buf_len,
 	/* One bit data is 16 bit is 2 byte modulation data */
 	enc_size = 2*2 /* SOF and EOF */
 		+ frame->numbytes * 8 * 2
-		+ ((frame->parameters.a.parity != NO_PARITY) ? 1 : 0)*8*2;
+		+ ((frame->parameters.a.parity != NO_PARITY) ? 1 : 0)*8*2
+		+ 6;
 
 	if (sample_buf_len < enc_size)
 		return -EINVAL;
 	
+	memset(sample_buf, 0, enc_size);
+	
 	samples16 = (u_int16_t*)sample_buf;
+	(*samples16) = 5;
+	samples16+=2; // SSC workaround
+	//*(samples16++) = 0xb;
 
 	/* SOF */
 	*(samples16++) = MANCHESTER_SEQ_D;
diff --git a/openpicc/application/ssc_picc.c b/openpicc/application/ssc_picc.c
index d92c7bc..b2fd00b 100644
--- a/openpicc/application/ssc_picc.c
+++ b/openpicc/application/ssc_picc.c
@@ -388,7 +388,7 @@ out_set_mode:
  * a PIO change interrupt, have Fast Forcing enabled for the PIO change interrupt and
  * then activate the SSC TX in the FIQ handler on rising TF. ssc_tx_pending is queried
  * by the fiq handler to see whether to start the transmitter. */
-#define USE_SSC_TX_TF_WORKAROUND
+//#define USE_SSC_TX_TF_WORKAROUND
 volatile u_int32_t ssc_tx_pending = 0;
 
 /* This is the time that the TF FIQ should spin until before SWTRG'ing the tc_cdiv.
@@ -398,7 +398,7 @@ volatile u_int32_t ssc_tx_fiq_fdt_cdiv = 0;
  * There must be enough time between these two! */
 volatile u_int32_t ssc_tx_fiq_fdt_ssc = 0;
 #ifndef USE_SSC_TX_TF_WORKAROUND
-#error Transmission is broken without USE_SSC_TX_TF_WORKAROUND, see comments in code
+//#error Transmission is broken without USE_SSC_TX_TF_WORKAROUND, see comments in code
 #endif
 
 void ssc_tf_irq(u_int32_t pio);
@@ -417,7 +417,7 @@ void ssc_tx_start(ssc_dma_tx_buffer_t *buf)
 #ifdef USE_SSC_TX_TF_WORKAROUND
 	start_cond = AT91C_SSC_START_CONTINOUS;
 #else
-	start_cond = AT91C_SSC_START_RISE_RF;
+	start_cond = AT91C_SSC_START_HIGH_RF;
 #endif
 	sync_len = 1;
 	data_len = 32;
@@ -435,15 +435,15 @@ void ssc_tx_start(ssc_dma_tx_buffer_t *buf)
 	AT91F_SSC_EnableIt(ssc, AT91C_SSC_ENDTX);
 	/* Enable DMA */
 	AT91F_PDC_EnableTx(tx_pdc);
-	AT91F_PDC_SetTx(tx_pdc, buf->data, num_data);
+	//AT91F_PDC_SetTx(tx_pdc, buf->data, num_data);
+#ifdef OPENPICC_USE_SSC_DATA_GATING
+	ssc_set_data_gate(0);
+#endif
 	/* Start Transmission */
 #ifndef USE_SSC_TX_TF_WORKAROUND
 	AT91F_SSC_EnableTx(AT91C_BASE_SSC);
 #else
 	ssc_tx_pending = 1;
-#ifdef OPENPICC_USE_SSC_DATA_GATING
-	ssc_set_data_gate(0);
-#endif
 	pio_irq_enable(OPENPICC_SSC_TF);
 	if(AT91F_PIO_IsInputSet(AT91C_BASE_PIOA, OPENPICC_SSC_TF)) {
 		/* TF was probably already high when we enabled the PIO change interrupt for it. */
@@ -596,6 +596,7 @@ static void __ramfunc ssc_irq(void)
 #ifdef OPENPICC_USE_SSC_DATA_GATING
 		ssc_set_data_gate(1);
 #endif
+		AT91F_SSC_EnableTx(AT91C_BASE_SSC);
 		//usb_print_string_f("ENDTX ", 0);
 		if(ssc_tx_buffer.state == PENDING) {
 			ssc_tx_buffer.state = FREE;
diff --git a/openpicc/application/tc_cdiv.c b/openpicc/application/tc_cdiv.c
index 226abbe..fb7db91 100644
--- a/openpicc/application/tc_cdiv.c
+++ b/openpicc/application/tc_cdiv.c
@@ -34,6 +34,14 @@ AT91PS_TCB tcb = AT91C_BASE_TCB;
 /* set carrier divider to a specific */
 void __ramfunc tc_cdiv_set_divider(u_int16_t div)
 {
+	if(tcb->TCB_TC0.TC_CV > div
+#ifdef OPENPICC_USE_CLOCK_GATING
+	/* Don't spin if FRAME_BURST is clear, the clock is stopped in this case */
+	&& !(!AT91F_PIO_IsInputSet(AT91C_BASE_PIOA, OPENPICC_PIO_FRAME_BURST))
+#endif
+	) {
+		while(tcb->TCB_TC0.TC_CV > 3); /* Three carrier cycles are about 10 clock cycles, should be enough for the loop */  
+	}
 	tcb->TCB_TC0.TC_RC = div;
 
 	/* set to 50% duty cycle */