summaryrefslogtreecommitdiff
path: root/openpicc/os/core/ARM7_AT91SAM7S/portISR.c
diff options
context:
space:
mode:
Diffstat (limited to 'openpicc/os/core/ARM7_AT91SAM7S/portISR.c')
-rw-r--r--openpicc/os/core/ARM7_AT91SAM7S/portISR.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/openpicc/os/core/ARM7_AT91SAM7S/portISR.c b/openpicc/os/core/ARM7_AT91SAM7S/portISR.c
index 507712e..6f92c24 100644
--- a/openpicc/os/core/ARM7_AT91SAM7S/portISR.c
+++ b/openpicc/os/core/ARM7_AT91SAM7S/portISR.c
@@ -178,7 +178,7 @@ vPortDisableInterruptsFromThumb (void)
{
asm volatile ("STMDB SP!, {R0} \n\t" /* Push R0. */
"MRS R0, CPSR \n\t" /* Get CPSR. */
- "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
+ "ORR R0, R0, #0x80 \n\t" /* Disable IRQ, don't disable FIQ. */
"MSR CPSR, R0 \n\t" /* Write back modified value. */
"LDMIA SP!, {R0} \n\t" /* Pop R0. */
"BX R14"); /* Return back to thumb. */
@@ -206,7 +206,7 @@ vPortEnterCritical (void)
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
asm volatile ("STMDB SP!, {R0} \n\t" /* Push R0. */
"MRS R0, CPSR \n\t" /* Get CPSR. */
- "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
+ "ORR R0, R0, #0x80 \n\t" /* Disable IRQ, don't disable FIQ. */
"MSR CPSR, R0 \n\t" /* Write back modified value. */
"LDMIA SP!, {R0}"); /* Pop R0. */
personal git repositories of Harald Welte. Your mileage may vary