diff options
| author | (no author) <(no author)@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2006-07-23 13:01:34 +0000 |
|---|---|---|
| committer | (no author) <(no author)@6dc7ffe9-61d6-0310-9af1-9938baff3ed1> | 2006-07-23 13:01:34 +0000 |
| commit | 56fa0102a8be4ab63e23b88675fa38ef6d5d554c (patch) | |
| tree | 54715f2f8c1971439301940805716f90f907c7e4 /openpcd/pll.txt | |
| parent | 94d184f816cb19c414fe6bd95600e6be079ac2f9 (diff) | |
add pll calculation helper
git-svn-id: https://svn.openpcd.org:2342/trunk@17 6dc7ffe9-61d6-0310-9af1-9938baff3ed1
Diffstat (limited to 'openpcd/pll.txt')
| -rw-r--r-- | openpcd/pll.txt | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/openpcd/pll.txt b/openpcd/pll.txt new file mode 100644 index 0000000..d086630 --- /dev/null +++ b/openpcd/pll.txt @@ -0,0 +1,7 @@ +MAINCLK = 18.432MHz +PLLCLK(div=24,mul=125) = 96MHz +MCLK(divisor 2) = 48MHz +USB(divisor 2) = 48MHz +MC_FWR(FWS) = 2 # 1 flash waitstate + +SPCK(SCBR=10) = 4.8MHz # 5MHz max clock RC632 |